New Strategies for Engineering Tensile Strained Si Layers for Novel n-Type MOSFET

Abstract

We report a novel approach for engineering tensely strained Si layers on a relaxed Silicon Germanium On Insulator (SGOI) film using a combination of condensation, annealing and epitaxy in selected conditions well chosen based on elastic simulations. The study evidences the remarkable role of SiO2 buried oxide layer (BOX) on the elastic behavior of the system. We show that tensely strained Si can be engineered by using alternatively rigidity (at low temperature) and viscoelasticity (at high temperature) of the SiO2 substrate. In these conditions, we get a Si strained layer perfectly flat and free of defects on top of relaxed Si1−xGex. We found very specific annealing conditions to relax SGOI while keeping an homogeneous Ge concentration and an excellent thickness uniformity resulting from the viscoelasticity of SiO2 at this temperature, which would allow layer by layer matter redistribution.Remarkably, Si layer epitaxially grown on relaxed SGOI remains fully strained with -0.85 % tensile strain. The absence of strain sharing (between Si1−xGex and Si) is explained by the rigidity of the Si1−xGex/BOX interface at low temperature. Elastic simulations of the real system show that, due to the very specific elastic characteristics of SiO2, there are unique experimental conditions that both relax Si1−xGex and keep Si strained. Various epitaxial processes could be revisited in the light of these new results. The generic and simple process implemented here meets all the requirements of the microelectronics industry and should be rapidly integrated in the fabrication lines of large multifinger 2.5 V n-type MOSFET on SOI used for RF-switches applications and for many other applications.

Strain Engineering of the Electronic States of Silicon‐Based Quantum Emitters

“…[ 58–62 ] Similar results can be obtained by deposition of stressors [ 63 ] or by deposition of Si atop a strained substrate (e.g. made of SiGe) [ 64 ] opening the way to finely control the position of the ZPL of the emitters (e.g. with respect to a photonic resonance of a resonant cavity).…”

Local defect-free elastic strain relaxation of Si1-xGex embedded into SiO2

“…They report a significant compressive strain of about 1% at 900°C while at 1000°C, this compressive strain is reduced to 0.7% due to the intermixing between the Si with the Si 1-x Ge x layer and the Si 1-x Ge x layer is completely relaxed at 1080 °C. A recently developed process based on condensation/annealing steps has created tensilely strained Si layers epitaxially grown on relaxed SGOI with −0.85% tensile strain in the out-of-plane direction for multifinger 2.5 V n-type MOSFET on SOI for RF-switch applications [38]. In parallel, it was reported that during high temperature treatment, the SiO 2 film becomes viscous and the strained thin film on this viscous oxide is morphologically unstable.…”