As the feature size of the semiconductor device is becoming increasingly smaller and the transistor has become three-dimensional (e.g. Fin-FET structure), a simple Line Edge Roughness (LER) is no longer sufficient for characterizing these devices. Sidewall Roughness (SWR) is now the more proper metric for these metrology applications. However, current metrology technologies, such as SEM and OCD, provide limited information on the sidewall of such small structures. The subject of this study is the sidewall roughness measurement with a three-dimensional Atomic Force Microscopy (AFM) using tilted Z scanner. This 3D AFM is based on a decoupled XY and Z scanning configuration, in which the Z scanner can be intentionally tilted to the side. A sharp conical tip is typically used for imaging, which provides high resolution capability on both the flat surfaces (top and bottom) and the steep sidewalls.