Ni/SiC–6H Schottky Barrier Diode interfacial states characterization related to temperature

Benamara, M. A.; Anani, M.; Akkal, B.; Benamara, Z.

doi:10.1016/j.jallcom.2014.02.177

Cited by 18 publications

(5 citation statements)

References 37 publications

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“…As the temperature rises, the ideality factor (n) falls, and its values decrease (9.59-5.52). These results are well-matched with works by other investigators, [23][24][25][26][27][28][29][30][31][32][33][34] values of electrical parameters such as ideality factor, series resistance, barrier height listed in Table I. , 11c-11g increase linearity with temperature growth, at frequency 1 × 10 7 Hz the ε′ values decline with temperature up to 320 K, then growth with temperature after that at frequency 10 Hz as displayed in Fig.…”

Section: Resultssupporting

confidence: 90%

Carbon Nanotubes/N-Si Heterojunction with High Dielectric Constant and Rectification Ratio, Low Dielectric Loss Tangent

Ashery¹,

Gad²,

Turky³

et al. 2022

ECS J. Solid State Sci. Technol.

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The structure of carbon nanotubes behaves as a p-type semiconductor deposited on the n-silicon wafer formed P-N junction was investigated. This structure of Au/CNTs/n-Si/Al has novel electric and dielectric properties such as high rectification ratio, low dielectric loss tangent, and high dielectric loss (ɛ'), which increases with declines frequency reaches to 4x104 in the positive direction of dielectric constant at a frequency equals 100 Hz and reaches to -1x106 in the negative region of dielectric constant at frequency 10 Hz. The dielectric loss tangent (tanδ) has low values which are raised with a decline in frequencies, causing their values to fluctuate from 0.15 to 0. 20. The ɛ' and tanδ have negative values at high and low frequencies, though the ɛ' has positive values at mid frequencies. The electrical properties of this device were investigated by studying I-V, Cheung, dv/dlnI, and Norde characterization. The parameters such as rectification ratio (RR), the resistance of junction (Rj), barrier height (ɸb), and ideality factor were calculated.

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Section: Resultssupporting

confidence: 90%

Carbon Nanotubes/N-Si Heterojunction with High Dielectric Constant and Rectification Ratio, Low Dielectric Loss Tangent

Ashery¹,

Gad²,

Turky³

et al. 2022

ECS J. Solid State Sci. Technol.

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“…As is known, the leakage current of devices may be affected by a lot of factors, including surface defects, crystal defects, deep level defects, interface states, and crystal quality, etc. [41][42][43]. Combined with the above analysis, we can infer that the epitaxy process with different C/Si ratios may affect the interface state, deep level defects or crystal quality of the epilayer, resulting in different reverse leakage current changing with C/Si ratios.…”

Section: Resultsmentioning

confidence: 83%

“…states, and crystal quality, etc. [41][42][43]. Combined with the above analysis, we can infer that the epitaxy process with different C/Si ratios may affect the interface state, deep level defects or crystal quality of the epilayer, resulting in different reverse leakage current changing with C/Si ratios.…”

Section: Resultsmentioning

confidence: 83%

Effect of Various Defects on 4H-SiC Schottky Diode Performance and Its Relation to Epitaxial Growth Conditions

Meng

et al. 2020

Micromachines

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In this paper, the chemical vapor deposition (CVD) processing for 4H-SiC epilayer is investigated with particular emphasis on the defects and the noise properties. It is experimentally found that the process parameters of C/Si ratio strongly affect the surface roughness of epilayers and the density of triangular defects (TDs), while no direct correlation between the C/Si ratio and the deep level defect Z1/2 could be confirmed. By adjusting the C/Si ratio, a decrease of several orders of magnitudes in the noise level for the 4H-SiC Schottky barrier diodes (SBDs) could be achieved attributing to the improved epilayer quality with low TD density and low surface roughness. The work should provide a helpful clue for further improving the device performance of both the 4H-SiC SBDs and the Schottky barrier ultraviolet photodetectors fabricated on commercial 4H-SiC wafers.

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“…The Schottky metal is Platinum with a workfunction of = 5.65 [47]. The Schottky and ohmic contacts are laterally separated by 40 . The Si substrate is considered lowly doped and of opposite conductivity type compared to the drift, according to the wafer specifications.…”

Section: Device Modelling Methodologymentioning

confidence: 99%

Experimental Investigation and Verification of Traps affecting the performance of 3C-SiC-on-Si Schottky Barrier Diodes

Arvanitopoulos

Jennings

et al. 2019

2019 IEEE Energy Conversion Congress and Exposition (ECCE)

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Monolithic integration of wide bandgap (WBG) devices for power integrated circuits is currently of increased interest. The ability of the cubic phase (3C-) of Silicon Carbide (SiC) to grow heteroepitaxially on Silicon (Si) substrates (3C-SiC-on-Si) is an enabling feature for a cost-effective integration, including the possible integration with Si devices. The isotropic properties of 3C-SiC and the high thermal conductivity also emphasize its importance. In this paper, the authors evaluated the actual 3C-SiC-on-Si material and established a feasible fabrication methodology. In achieving this, non-freestanding lateral Schottky Barrier Diodes (LSBD) have been fabricated and tested. To gain a deep physical insight of the complex phenomena that take place in this material, an advanced Technology Computer Aided Design (TCAD) model was developed which allowed accurate match of measurements with simulations. The model incorporated the device geometry, an accurate representation of the bulk material properties and complex trapping/de-trapping and tunnelling phenomena which appear to affect the device performance. The observed nonuniformities of the Schottky Barrier Height (SBH) were also successfully modelled through the effect of the interfacial traps. The combination of TCAD with fabrication and measurements enabled the identification of the trap profiles and their impact on the electrical performance of this new material, a necessary step towards device designs that take advantage of its properties.

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Ni/SiC–6H Schottky Barrier Diode interfacial states characterization related to temperature

Cited by 18 publications

References 37 publications

Carbon Nanotubes/N-Si Heterojunction with High Dielectric Constant and Rectification Ratio, Low Dielectric Loss Tangent

Carbon Nanotubes/N-Si Heterojunction with High Dielectric Constant and Rectification Ratio, Low Dielectric Loss Tangent

Effect of Various Defects on 4H-SiC Schottky Diode Performance and Its Relation to Epitaxial Growth Conditions

Experimental Investigation and Verification of Traps affecting the performance of 3C-SiC-on-Si Schottky Barrier Diodes

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