1977
DOI: 10.1002/j.1538-7305.1977.tb00555.x
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No.4 ESS: Peripheral System

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Cited by 15 publications
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“…T h e 1A processor issues mainte nance c o m m a n d s to the V I F through maintenance pulse points from a signal processor. 5 T h e V I F replies to the 1A via t h e peripheral unit reply bus ( P U R B ) . T h e E S T communicates with t h e 1A through a full peripheral unit b u s 5 ( P U B ) , E S T c o m m a n d s are issued from the 1A via the peripheral unit write bus ( P U W B ) , and the replies return by way of the P U R B .…”
Section: Maintenance Of Vif and Estmentioning
confidence: 99%
“…T h e 1A processor issues mainte nance c o m m a n d s to the V I F through maintenance pulse points from a signal processor. 5 T h e V I F replies to the 1A via t h e peripheral unit reply bus ( P U R B ) . T h e E S T communicates with t h e 1A through a full peripheral unit b u s 5 ( P U B ) , E S T c o m m a n d s are issued from the 1A via the peripheral unit write bus ( P U W B ) , and the replies return by way of the P U R B .…”
Section: Maintenance Of Vif and Estmentioning
confidence: 99%