Noise performance of 0.35-/spl mu/m SOI CMOS devices and micropower preamplifier following 63-MeV, 1-mrad (Si) proton irradiation

Abstract

Total dose and single-event radiation hardness, and operation over extreme temperatures make silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) processes leading contenders for space applications. This paper reports noise degradation of 0.35-m partially-depleted SOI CMOS devices and a micropower, low-noise preamplifier following 63-MeV proton irradiation to 1 Mrad (Si). Proton irradiation, relevant for space mission environments, was considered since it induces both ionizing and displacement damage. Preamplifier input-referred white-noise voltage was minimized at low power consumption by operating input devices in moderate inversion for high transconductance efficiency. Flicker-noise, important for gyros and other mission sensors having low-frequency outputs, was minimized by large-area pMOS input devices and careful management of noninput devices. Measured 1-Hz gate-referred, flicker-noise voltage density increased 24 and 32% for pMOS and nMOS test devices respectively following 1 Mrad (Si) irradiation. Measured 1-Hz input-referred noise voltage density increased 22% between a nonirradiated and radiated preamplifier sample, which agrees closely with the 24% increase expected since noise is dominated by pMOS input devices. Device small-signal transconductance and white-noise were largely unchanged while output conductance appeared to increase over a factor-of-three. This suggests a modest design margin is required to maintain flicker noise performance, while substantial design margin may be required to maintain open-loop voltage gain.Index Terms-Analog complementary metal oxide semiconductor (CMOS), flicker noise, micropower, moderate inversion, noise, output conductance, preamplifier, proton irradiation, radiation effects, silicon-on-insulator (SOI), space applications, transconductance efficiency.

Low-frequency noise in downscaled silicon transistors: Trends, theory and practice

“…Data for BJT and HBT originate to several publications and were reported earlier in [29]. Since no publication for MOS transistors reporting f c and f T simultaneously from measurements was found, then the missing portion of data for MOS transistor was recalculated using long channel approximation [169] applied to available data for () nMOS transistors from 0.8μm node [136], ( ) for nMOS and pMOS transistors from 0.35μm SOI node [86], ( ) for RF nMOS transistors with drawn channel length L=0.13μm, width W=72 and different number of fingers [214], ( ) for nMOS and pMOS transistors from 0.13μm node [102], and ( ) for nMOS transistor from 0.09μm node [105]. The lines are calculated according to eq.…”

“…Third, the lowfrequency noise in MOS transistors is higher than the noise in BJTs, as one can see in Figure 15. In this figure, the data are for 134 nMOS transistors from [22,47,48,49,50,51,72,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123], and for 53 pMOS transistors from [47,52,86,…”

“…We have collected data from [22,47,48,49,50,51,72,82,86,87,88,89,90,91,92,93,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,149] for nMOS transistors and from [47,52,86,88,94,95,96,97,100,102,104,105,109,124,125,126,…”

“…Unfortunately, and in contrast to the research on BJT, there is no publication for MOS transistors, which reports f c and f T simultaneously from measurements, which is needed to verify whether the extrapolation of low-frequency noise over many decades is accurate for the practice. The recalculation of the partially available data [86,102,105,136,214] is shown with symbols in Figure 39 and the recalculation uses the equations deduced in this section. The recalculated data suggest the same range for f c /f T predicted by using eq.…”

“…Input-referred voltage noise S V G (gate voltage 1/f noise at 1Hz) in silicon MOS transistors compared to the corresponding S V B in silicon npn BJTs. ( ) for nMOS transistors from[22,47,48,49,50,51,72,82,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123], ( ) for pMOS transistors from[47,52,…”