Non-Boolean Computing Benchmarking for Beyond-CMOS Devices Based on Cellular Neural Network

Pan, Chenyun; Naeemi, Azad

doi:10.1109/jxcdc.2016.2633251

Cited by 35 publications

(29 citation statements)

References 37 publications

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“…8 The first kind of digital NN is based on SRAM synapses that only provide a weight, while the multiplication and summation (MAC) operations are performed consecutively in the neuron [29]. The circuit considered here follows that in [22]: a synapse consists of n-bits of a SRAM register and state element; a neuron consists of two n-bit registers, an n-bit adder, n NAND gates, n inverters, and three n-state elements. Therefore area of the synapse and the neuron are the sums of the areas of the above constituent circuits.…”

Section: Types Of Neuromorphic Devicesmentioning

confidence: 99%

“…We assume a cell similar to that in [22], where a neuron consists of an opamp, a current source, and a threshold function circuit; a synapse consist of 2 operational transconductance amplifiers (OTA), see also [30]. Transistors of various width are used, Table 1.…”

Section: Types Of Neuromorphic Devicesmentioning

confidence: 99%

“…Neural network parameters related to Hebbian learning are based on the synaptic weight information: the maximum weight value obtained from the training weights, and the average summation of the weights per cellular cell [22], Table 1. a) b) Figure 6.…”

Section: Cennmentioning

confidence: 99%

“…We considered examples of neuromorphic workloads, including 1) CoNN such as LeNet [45,46], shown in Figure 9; 2) AlexNet [47]; 3) a single stage convolution of a 35x35 pixel image with 24 filters of 5x5 pixels; 4) a single stage associative memory of pixel patterns [22]; 5) a DNN for recognition of hand-written digits from the MNIST hand-written-digit image database [48] implemented as a multi-layer perceptron (MLP) with 784×256×128×10 fully-connected neurons in layers; 6) a DNN for speech recognition from [18]a 4 layer MLP with 390x256x256x29 neurons. 22 While all of these networks belong to the class of non-recurrent DNN, these are examples of ubiquitous applications required by users. However these workloads may not be favorable to SNNs.…”

Section: Neuromorphic Computing Workloads Vs Hardwarementioning

confidence: 99%

“…The Eyeriss simulation tool focuses on accelerators for DNN [20]. The CrossSim simulator has similar capabilities [21].Benchmarking of a variety of devices, including beyond-CMOS ones, has been done in an approach similar to ours, but for one type of neural networks only, cellular neural networks (CeNN) [22]. Various estimates of time and energy of operation for certain types of digital and analog devices have been done previously [23,24,25,26].…”

mentioning

confidence: 99%

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Benchmarking Delay and Energy of Neural Inference Circuits

Nikonov

Young

2019

IEEE J. Explor. Solid-State Comput. Devices Circuits

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Numerous neural network circuits and architectures are presently under active research for application to artificial intelligence and machine learning. Their physical performance metrics (area, time, energy) are estimated. Various types of neural networks (artificial, cellular, spiking, and oscillator) are implemented with multiple CMOS and beyond-CMOS (spintronic, ferroelectric, resistive memory) devices. A consistent and transparent methodology is proposed and used to benchmark this comprehensive set of options across several application cases. Promising architecture/device combinations are identified.In the last few years, AI/ML achieved prominent successes, especially related to deep neural networks (DNN) [7] and convolutional neural networks (CoNN). ML has enabled a revolutionary improvement in the accuracy of image, pattern, and facial recognition, including 2 the treatment of 'big data' online. More demand for neural computing is emerging in robotic control, autonomous vehicles, drones, etc.One of the main concerns on the minds of developers of AI computing systems is the same as for traditional computing: the power consumption in the chips. The history of traditional computing shows that the commercial success of computing devices and architectures is predicated largely on their physical performanceareal density, speed of operation, and consumed energy as benchmarked in [8,9]. These ultimately translate into processing throughput and consumed power of the chips, which are of utmost importance to the user. A fair comparison between the published neural network implementations is difficult due to the difference in the process technology generation, the network architectures, and computing workloads.The main purpose of the paper is to establish a methodology for comparing various neural network hardware approaches and to understand the trends revealed through its development. In doing that we strive to adhere to the following principles: a) general: wide scope of technologies, devices and circuits; b) transparent: simple analytics more important than precise simulations; c) uniform: consistent inputs and assumptions across multiple types of hardware; d) transparent: all models used are described and the code is available [10] to the reader for verification.Let us differentiate this work from the existing body of literature. We do not aim to give a literature review, and refer the reader to the excellent review papers in the neuromorphic hardware field [11,12] which do not attempt to quantitatively compare prior works, as we do in this paper. Oftentimes benchmarking refers to comparing various algorithms for an application mainly based on their accuracy and with little reference to hardware implementation, e.g. [13]. In contrast, we compare different types of hardware implementing the same algorithm and focusing on its energy consumption and performance.The discussion of neural networks in the numerous papers currently being published remains at the architecture level. For example, the accuracy of recognition...

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Section: Types Of Neuromorphic Devicesmentioning

confidence: 99%

Section: Types Of Neuromorphic Devicesmentioning

confidence: 99%

Section: Cennmentioning

confidence: 99%

Section: Neuromorphic Computing Workloads Vs Hardwarementioning

confidence: 99%

mentioning

confidence: 99%

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Benchmarking Delay and Energy of Neural Inference Circuits

Nikonov

Young

2019

IEEE J. Explor. Solid-State Comput. Devices Circuits

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A reliable non‐volatile in‐memory computing associative memory based on spintronic neurons and synapses

Rezaei,

Amirany,

Moaiyeri

et al. 2024

Engineering Reports

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This article introduces an innovative non‐volatile associative memory (AM) that leverages spintronic synapses, employing magnetic tunnel junctions (MTJ) in conjunction with neurons constructed using carbon nanotube field‐effect transistors (CNTFETs). Our proposed design represents a significant advancement in area optimization and outperforms prior designs. We adopt MTJ‐based spintronic devices due to their remarkable attributes, including dependable reconfigurability and nonvolatility. Simultaneously, CNTFETs effectively address the longstanding limitations traditionally associated with MOSFETs. In this work, our proposed design undergoes rigorous simulations that account for process variations. The results demonstrate that our AM system closely approximates its ideal mathematical model, even with significant process variations. Furthermore, we investigate the impact of Tunnel Magnetoresistance (TMR) on the performance of our proposed AM system. Our investigations reveal that, even with a TMR as low as 100%, our design matches and often surpasses the performance of its counterparts operating with a TMR of 300%. This achievement holds profound significance from a fabrication standpoint, as fabricating MTJs with high TMR values can be intricate and costly. Overall, our novel AM system represents a significant breakthrough in emerging technologies, harnessing the unique strengths of spintronic synapses and advanced carbon nanotube transistors while robustly addressing challenges in performance and variability.

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Unconventional computing based on magnetic tunnel junction

Cai

Xin

et al. 2023

Appl. Phys. A

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The conventional computing method based on the von Neumann architecture is limited by a series of problems such as high energy consumption, finite data exchange bandwidth between processors and storage media, etc., and it is difficult to achieve higher computing efficiency. A more efficient unconventional computing architecture is urgently needed to overcome these problems. Neuromorphic computing and stochastic computing have been considered to be two competitive candidates for unconventional computing, due to their extraordinary potential for energy-efficient and high-performance computing. Although conventional electronic devices can mimic the topology of the human brain, these require high power consumption and large area. Spintronic devices represented by magnetic tunnel junctions (MTJs) exhibit remarkable high-energy efficiency, non-volatility, and similarity to biological nervous systems, making them one of the promising candidates for unconventional computing. In this work, we review the fundamentals of MTJs as well as the development of MTJ-based neurons, synapses, and probabilistic-bit. In the section on neuromorphic computing, we review a variety of neural networks composed of MTJ-based neurons and synapses, including multilayer perceptrons, convolutional neural networks, recurrent neural networks, and spiking neural networks, which are the closest to the biological neural system. In the section on stochastic computing, we review the applications of MTJ-based p-bits, including Boltzmann machines, Ising machines, and Bayesian networks. Furthermore, the challenges to developing these novel technologies are briefly discussed at the end of each section.

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Non-Boolean Computing Benchmarking for Beyond-CMOS Devices Based on Cellular Neural Network

Cited by 35 publications

References 37 publications

Benchmarking Delay and Energy of Neural Inference Circuits

Benchmarking Delay and Energy of Neural Inference Circuits

A reliable non‐volatile in‐memory computing associative memory based on spintronic neurons and synapses

Unconventional computing based on magnetic tunnel junction

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