Nonbinary LDPC codes constructed based on a cyclic MDS code and a low-complexity nonbinary message-passing decoding algorithm

Chen, Chao; Bai, Baoming; Wang, Xinmei; Xu, Ming

doi:10.1109/lcomm.2010.03.092296

Cited by 23 publications

(19 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In Algorithm 1 the GBFDA from [2] is described. The same nomenclature as the one included in [2] is used in this paper.…”

Section: Gbfdamentioning

confidence: 99%

“…The same nomenclature as the one included in [2] is used in this paper. Two different parts can be distinguished: the iterative process and the tentative decoding step.…”

Section: Gbfdamentioning

confidence: 99%

“…Steps A5 and A6 form the tentative decoding process, which does not affect the iterative process. For a more detailed explanation of the algorithm we refer to [2].…”

Section: Gbfdamentioning

confidence: 99%

See 2 more Smart Citations

Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes

García-Herrero

Canet

Valls

2012

Circuits Syst Signal Process

View full text Add to dashboard Cite

A VLSI architecture for the generalized bit-flipping decoding algorithm for non-binary low-density parity-check codes is proposed in this paper. The tentative decoding steps of the algorithm have been modified to avoid computing and storing a matrix of dimension N × 2 q , for a code (N, K) over GF(2 q ), reducing its complexity with a minimal penalization of its performance, less than 0.05 dB compared with the original algorithm. The architecture was synthesized using a 90 nm standard cell library, for the (837, 723) non-binary code over GF(2 5 ), requiring 590220 xor gates and achieving a throughput of 89 Mbps. Additionally, it was implemented in a Virtex-VI FPGA device with a cost of 4070 slices and a throughput of 44.6 Mbps.

show abstract

“…In Algorithm 1 the GBFDA from [2] is described. The same nomenclature as the one included in [2] is used in this paper.…”

Section: Gbfdamentioning

confidence: 99%

“…The same nomenclature as the one included in [2] is used in this paper. Two different parts can be distinguished: the iterative process and the tentative decoding step.…”

Section: Gbfdamentioning

confidence: 99%

See 1 more Smart Citation

Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes

García-Herrero

Canet

Valls

2012

Circuits Syst Signal Process

View full text Add to dashboard Cite

show abstract

“…These majority logic based algorithms only require finite field operations, integer additions and integer comparisons, providing efficient trade-off between complexity and performance. Inspired by bit-flipping (BF) decoding algorithm for binary LDPC, Chen first proposed a hard-decision based generalized bit-flipping (GBF) in [12]. A serial version symbol-reliability based algorithm is introduced in [13].…”

Section: Introductionmentioning

confidence: 99%

“…A serial version symbol-reliability based algorithm is introduced in [13]. This method can provide lower complexity and better performance than the algorithms in [12] due to the serial scheduling and a scaling parameter. In [14], an iterative soft reliabilitybased (ISRB) majority-logic decoding (MLGD) is proposed.…”

Section: Introductionmentioning

confidence: 99%

Informed dynamic scheduling strategies for novel majority-logic decoding of non-binary LDPC codes

Jamalipour

2015

2015 9th International Conference on Signal Processing and Communication Systems (ICSPCS)

View full text Add to dashboard Cite

Recent studies show that dynamic scheduling using the latest available information is superior to the flooding scheduling. While the existing works on informed dynamic scheduling focus on belief propagation (BP) based algorithm for binary LDPC codes, in this paper we devise novel methods which are appropriate for majority-logic decoding of non-binary LDPC codes. Firstly we propose a low complexity extrinsic message based decoding algorithm for non-binary LDPC codes. The novelty of this decoding algorithm lies in that we compute extrinsic messages and iteratively update the messages in every iteration. Then we propose a dynamic scheduling schemes specifically designed for majority-logic decoding of non-binary LDPC codes. The proposed scheduling method, named informed dynamic scheduling, can achieve better performance compared with the layered and the flooding schemes.Index Terms-LDPC; Non-binary LDPC; Informed dynamic scheduling; Majority logic decoding. I. INTRODUCTIONLow-Density-Parity-Check (LDPC) codes were firstly invented in early 1960s by Gallagar [1] and rediscovered by Mackay [2] in 1996. It has been proved that binary LDPC codes can achieve rates close to channel capacity when codeword length is long enough [3], and LDPC codes have become candidate communication protocols (WiFi, WiMax, etc). Recently, their counterpart, non-binary LDPC codes constructed over Galois field (GF) of size q, have shown their potential in improving the coding gain especially at small or moderate codeword lengths, or when higher order modulation is employed. By now, a great deal of research efforts have been done on non-binary LDPC codes defined over GF(q) [4]-[7], for some q > 0.Although non-binary LDPC codes have shown significant improvement in performance, the decoding process is much more complicated than binary LDPC codes. A straight-forward implementation of belief-propagation (BP) decoder requires O(q 2 ) complexity. Mackay [8] devised a fast Fourier transform (FFT) based q-ary sum-product algorithm (QSPA) to reduce the complexity from O(q 2 ) to O(q log q). Declercq [9] proposed the extended min-sum (EMS) algorithm where only a subset of the n m most significant messages in GF(q) is utilized. This decoding technique can reduce the computational complexity because n m is usually much smaller than q. In addition, the min-max algorithm [10] further reduces the complexity by replacing the sum operation with max operation in check node update. Unfortunately, these algorithms are still too complicated for some practical applications.

show abstract

LDPC Decoders

Savin

2014

Academic Press Library in Mobile and Wireless Communications

View full text Add to dashboard Cite

Nonbinary LDPC codes constructed based on a cyclic MDS code and a low-complexity nonbinary message-passing decoding algorithm

Cited by 23 publications

References 9 publications

Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes

Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes

Informed dynamic scheduling strategies for novel majority-logic decoding of non-binary LDPC codes

LDPC Decoders

Contact Info

Product

Resources

About