Nonlinear Driver Models for Timing and Noise Analysis

Tutuianu, Bogdan; Baldick, Ross; Johnstone, Mark S.

doi:10.1109/tcad.2004.835136

Cited by 12 publications

(6 citation statements)

References 31 publications

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“…The resistor in those models is typically referred to as the "drive resistor" and is used to express the timing arc's sensitivity to output capacitance, whereas the waveform shape itself is primarily expressed by the voltage or current source [14]. It has been recognized that greater information is required to accurately capture the delay models.…”

Section: Current Source Modelsmentioning

confidence: 99%

Addressing library creation challenges from recent Liberty extensions

Trihy

2008

Proceedings of the 45th Annual Design Automation Conference

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The Liberty Format is an open source industry standard for library modeling that has seen significant enhancement in recent years to address the challenges introduced by the new smaller technologies at 65nm and below. Issues associated with modeling Timing, Power and Noise have seen an explosion in complexity. The paper discusses the challenges introduced by the new high accuracy models and techniques to ameliorate them for Library providers.

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Section: Current Source Modelsmentioning

confidence: 99%

Addressing library creation challenges from recent Liberty extensions

Trihy

2008

Proceedings of the 45th Annual Design Automation Conference

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“…The response of to the same PWL input, , can be obtained by replacing and by and in (6), respectively. Adding with , we obtain the voltage response at the internal control node of the model as (7) The error function at can be obtained by plugging (7) into (4). To compute the derivatives, we first substitute (2) into (7) and differentiate (7) with respect to and to get (8) can be obtained by exchanging with in the previous equation.…”

Section: Input Stage Of the Signal Transfermentioning

confidence: 99%

“…However, with the increasing circuit speed, crosstalk noise, and inductive coupling in nanoscale designs, the true signal waveforms in nanometer regime can substantially deviate from the ramp model. Hence, it becomes increasingly difficult and inaccurate to estimate the timing performance based upon the simple ramp model [5]- [7]. To improve accuracy, several approaches have been proposed to either derive Manuscript received September 4, 2006; revised January 25, 2007.…”

Section: Introductionmentioning

confidence: 99%

Characterizing Multistage Nonlinear Drivers and Variability for Accurate Timing and Noise Analysis

Feng

Acar

2007

IEEE Trans. VLSI Syst.

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Nanoscale device characteristics and noise coupling have rendered traditional waveform-based gate delay models increasingly difficult to adopt. While the widely adopted delay models are built upon the assumption of simple ramp-like signal waveforms, realistic signal shapes in nanoscale designs can be far more complex. The need for considering process-voltage-temperature (PVT) variations imposes further accuracy requirement on gate models. We present a parameterizable waveform independent gate model (PWiM) where no assumption is made upon the input waveforms. The PWiM model is constructed by encapsulating the driver's intrinsic nonlinear dc and dynamic characteristics, which are important to model for complex signal waveforms, via novel and yet easy-to-implement characterization steps. As such, PWiM can provide near-SPICE accuracy for input signals that significantly deviate from simple ramps. While recently developed current-based models can only be applied to single channel-connected component, PWiM can work for multistage cells leading to improved library compactness and analysis efficiency. Our experiments have indicated that the proposed driver model not only provides up to two orders of magnitude speedups over SPICE for delay and noise analysis, it also offers accurate assessment of performance variability introduced by process and environmental variations.Index Terms-Gate delay modeling, process variations, timing and noise analysis, waveform independent models.

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“…The model proposed by Tutuianu et al [10] is also similar to [8] [9]. These vendor CSMs claim to primarily address accuracy concerns associated with the dominant delay model [2].…”

Section: Introductionmentioning

confidence: 99%

A multi-port current source model for multiple-input switching effects in CMOS library cells

Amin

Kashyap

Menezes

et al. 2006

Proceedings of the 43rd Annual Conference on Design Automation - DAC '06

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The problem of multiple-input switching (MIS) has been mostly ignored by the timing CAD community. Not modeling MIS for timing can result in as much as 100% error in stage delay and slew calculation. The impact is especially severe on stages immediately after a bank of flops, where the inputs have a high probability of arriving simultaneously. Other problems such as modeling of interconnect loads, complex (nonlinear/non-monotonic) input waveforms, power-droop impact on cell delay, nonlinear input capacitances, delay variations due to cross-capacitance, etc. are also known sources of error. In this paper, we introduce the multi-port current source model (MCSM). MCSM can efficiently handle an arbitrary number of simultaneously switching inputs, including single-input switching (SIS). Moreover, MCSM is comprehensive in that other modeling problems associated with delay and noise computation are elegantly covered. We demonstrate the applicability of MCSM on a large 65 nm industrial test-case. For cells experiencing MIS, the model yields delay and slew-rate errors within ±5% for 88.3% and 93.0% of the cases, respectively. We also present data that show that MCSM is an effective receiver model which captures active loading effects without incurring significant additional error. MCSM makes combined cell-level timing, noise, and power analysis a possibility.

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Nonlinear Driver Models for Timing and Noise Analysis

Cited by 12 publications

References 31 publications

Addressing library creation challenges from recent Liberty extensions

Addressing library creation challenges from recent Liberty extensions

Characterizing Multistage Nonlinear Drivers and Variability for Accurate Timing and Noise Analysis

A multi-port current source model for multiple-input switching effects in CMOS library cells

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