This paper addresses high frequency admittance
modelling of current-controlled voltage source converters (VSCs).
Recent studies have shown that harmonic instability may also
occur at frequencies above the Nyquist frequency. To form
an accurate multiple-frequency model in this frequency range,
sidebands that originate from modulation and sampling must
be examined. In this paper, an accurate small-signal model is
developed taking into account an adequate digital pulse-width
modulator (DPWM) representation, which allows to predict
dependence of the frequency response on the steady-state DC (SSDC) operating point. It is shown that, when center-pulse sampling
is implemented, PWM sidebands do not create additional loops
leaving only sampling sidebands to be considered. Using the same
approach as for SS-DC operation, a model which accurately represents admittance measurements during sinusoidal AC (S-AC)
operation is developed. Its basis is a novel DPWM model suitable
for S-AC regime, which allows to predict dependence of the VSC’s
input admittance on the grid voltage magnitude. Experimental
and simulated admittance measurements, performed on a single-phase two-level VSC during various SS-DC and S-AC regimes,
show an excellent match with the proposed models up to twice
the sampling frequency