Nonsilicon, Non-von Neumann Computing—Part II

Basu, S. K.; Bryant, Randal E.; Micheli, Giovanni De; Theis, Thomas; Whitman, Lloyd

doi:10.1109/jproc.2020.3001748

Cited by 5 publications

(5 citation statements)

References 8 publications

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“…With the apparent saturation of the progress in digital computers, new types of computers based on nonsilicon physical systems are highly anticipated. Unlike current digital computers based on Turing machine procedures, these computers use time evolution of physical systems to perform tasks such as speech and image recognition, data mining, and optimization (1). On the basis of a computing paradigm of "let physics do computation," they include quantum computers (2), quantum annealers (3), neural networks (4), and reservoir computers (5), implemented with various physical systems such as superconducting qubits (6,7), trapped ions (8), and photonics (9)(10)(11)(12).…”

Section: Introductionmentioning

confidence: 99%

100,000-spin coherent Ising machine

et al. 2021

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Computers based on physical systems are increasingly anticipated to overcome the impending limitations on digital computer performance. One such computer is a coherent Ising machine (CIM) for solving combinatorial optimization problems. Here, we report a CIM with 100,512 degenerate optical parametric oscillator pulses working as the Ising spins. We show that the CIM delivers fine solutions to maximum cut problems of 100,000-node graphs drastically faster than standard simulated annealing. Moreover, the CIM, when operated near the phase transition point, provides some extremely good solutions and a very broad distribution. This characteristic will be useful for applications that require fast random sampling such as machine learning.

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Section: Introductionmentioning

confidence: 99%

100,000-spin coherent Ising machine

et al. 2021

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“…With these limitations in mind, the present system, and similar alternatives based on FPGAs, should be considered primarily of relevance whenever the reconfigurability of programmable logic together with the fine-grained data set memory subdivision confers a possible advantage, for example, towards the realization of distributed sorting and aggregation. Future work should systematically compare this and other FPGA-based solutions to CPUs and GPUs across different types of machine learning algorithms [9], [10], [12], [13], [17], [18], [22]- [29].…”

Section: Discussionmentioning

confidence: 99%

“…For example, Graphics Processing Units (GPUs) are, by design, highly efficient at the arithmetic operations required by several distance measures, such the 2 -norm; as such, they are receiving considerable attention for use as co-processors accelerating vector similarity searching, operating alone or conjointly with the CPU. Their development has been considerably boosted by applications in convolutional neural networks and deep learning; however, even compute-optimized implementations retain several architecture choices stemming from the original graphics applications, which frequently translate into a high power consumption [3], [9]- [12].…”

Section: Introductionmentioning

confidence: 99%

iFLEX: A Fully Open-Source, High-Density Field-Programmable Gate Array (FPGA)-Based Hardware Co-Processor for Vector Similarity Searching

Minati

Movsisyan

McCormick³

et al. 2019

IEEE Access

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Vector similarity searching consists of comparing a query vector against a high volume of entries in a reference data set, according to a chosen similarity metric such as the L1-norm, L2norm, or Hamming distance. Large-scale research and commercial applications of these computations are developing rapidly across artificial intelligence fields as diverse as semantic text querying, retrieval of multimedia materials, and prediction of the properties of pharmacological molecules and engineered materials. While vector similarity searching is, at present, predominantly implemented on standard central processing unit (CPU) hardware running optimized indexing algorithms, the interest in massively-parallel computing architectures is increasing. Accordingly, a range of systems based on graphics processing units (GPU) and field-programmable gate arrays (FPGA) have been proposed; however, the availability of the design materials for these systems remains largely confined to a small number of corporations and research institutions. Here, we introduce a fully open-source hardware accelerator for vector similarity searching, based on an array of 21 FPGAs densely intertwined with 42 GB of high-speed dynamic memory and installed on a custom-designed compute node board, which yields an aggregate bandwidth of 33.6 GB/s and can be seamlessly reconfigured to implement nearly arbitrary distance calculations. A novel logic and software architecture, based on a lane-wise organization of independent engines implementing distributed distance calculation and sorting, allows attaining noteworthy query latency and power consumption performance on both single-and multi-node system configurations. The entire circuit board hardware, FPGA logic, and host software design is herein presented and freely provided for unlimited use, supporting open innovation and research in this area.

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“…Moreover, the same crossbar can be used for "compute-inmemory" processing of certain key computations of a DNN. Integrating storage and computations within the same structure allows memristor crossbars to supersede conventional digital accelerators where limited memory-processor bandwidth becomes the key bottleneck for performance scaling (Chen et al, 2016;Basu et al, 2018;Kim et al, 2020).…”

Section: Introductionmentioning

confidence: 99%

Higher order neural processing with input-adaptive dynamic weights on MoS2 memtransistor crossbars

Rahimifard

Shylendra²,

Nasrin³

et al. 2022

Front. Electron. Mater

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The increasing complexity of deep learning systems has pushed conventional computing technologies to their limits. While the memristor is one of the prevailing technologies for deep learning acceleration, it is only suited for classical learning layers where only two operands, namely weights and inputs, are processed simultaneously. Meanwhile, to improve the computational efficiency of deep learning for emerging applications, a variety of non-traditional layers requiring concurrent processing of many operands are becoming popular. For example, hypernetworks improve their predictive robustness by simultaneously processing weights and inputs against the application context. Two-electrode memristor grids cannot directly map emerging layers’ higher-order multiplicative neural interactions. Addressing this unmet need, we present crossbar processing using dual-gated memtransistors based on two-dimensional semiconductor MoS2. Unlike the memristor, the resistance states of memtransistors can be persistently programmed and can be actively controlled by multiple gate electrodes. Thus, the discussed memtransistor crossbar enables several advanced inference architectures beyond a conventional passive crossbar. For example, we show that sneak paths can be effectively suppressed in memtransistor crossbars, whereas they limit size scalability in a passive memristor crossbar. Similarly, exploiting gate terminals to suppress crossbar weights dynamically reduces biasing power by ∼20% in memtransistor crossbars for a fully connected layer of AlexNet. On emerging layers such as hypernetworks, collocating multiple operations within the same crossbar cells reduces operating power by ∼15× on the considered network cases.

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Nonsilicon, Non-von Neumann Computing—Part II

Cited by 5 publications

References 8 publications

100,000-spin coherent Ising machine

100,000-spin coherent Ising machine

iFLEX: A Fully Open-Source, High-Density Field-Programmable Gate Array (FPGA)-Based Hardware Co-Processor for Vector Similarity Searching

Higher order neural processing with input-adaptive dynamic weights on MoS2 memtransistor crossbars

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