Nonvolatile multibit SRAM, bit level caching, and multi-context computing for IoT

Abstract

We propose a new memory hierarchy for energy conscious internet of things (IoT) integrated circuits. In this scheme a new type of SRAM cell -hybrid of SRAM/DRAM or SRAM/NVM memory -that is capable of storing multiple bits are used to bring caching to the bit level, near processor cores. This new scheme is expected to have energy efficiency advantage over traditional memory hierarchy for multi-context computation, especially suitable for many IoT applications.