Nonvolatile Polycrystalline-Silicon Thin-Film-Transistor Silicon–Oxide–Nitride–Oxide–Silicon Memory with Periodical Finlike Channels Fabricated Using Nanoimprint Technology

Chen, Henry J. H.; Huang, Chien-Jen

doi:10.7567/apex.6.024201

Cited by 3 publications

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References 20 publications

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“…NIL has also been successfully applied in the fabrications of organic nanoelectronics [96][97][98][99][100][101], photovoltaic devices with Si nanowires [102], single-electron memory device [103], organic [97] and inorganic nonvolatile memory [104], single-electron transistors [105,106] and poly-Si TFTs [107], etc. According to the physical characteristics of nanoimprint, this technique should find particular prospects for flexible nanoelectronics in which highly conductive polymers are demanded to be developed as the main materials for the devices and circuits.…”

Section: Nil For T-shape Gates and Hemtsmentioning

confidence: 99%

Applications of nanoimprint lithography/hot embossing: a review

Chen

2015

Appl. Phys. A

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This review concentrates on the applications of nanoimprint lithography (NIL) and hot embossing for the fabrications of nanolectronic devices, nanophotonic metamaterials and other nanostructures. Technical challenges and solutions in NIL such as nanofabrication of templates, removal of residual resist, pattern displacement in thermal NIL arising from thermal expansion are first discussed. In the nanofabrication of templates, dry etch in plasma for the formation of multi-step structures and ultra-sharp tip arrays in silicon, nanophotonic chiral structures with high aspect ratio in SiC are demonstrated. A bilayer technique for nondestructive removal of residual resist in thermal NIL is described. This process is successfully applied for the fabrication of T-shape gates and functional high electron mobility transistors. However, pattern displacement intrinsically existing in thermal NIL/hot embossing owing to different thermal expansions in the template and substrate, respectively, limits its further development and scale-up. Low temperature even room temperature NIL (RTNIL) was then proposed on HSQ, trying to eliminate the pattern distortion by avoiding a thermal loop in the imprint. But, considerable pressure needed in RTNIL turned the major attentions to the development of UVcuring NIL in UV-curable monomers at low temperature. A big variety of applications by low-temperature UV-curing NIL in SU-8 are described, including high-aspect-ratio phase gratings, tagging technology by nanobarcode for DNA sequencing, nanofluidic channels, nanophotonic metamaterials and biosensors. Hot embossing, as a parallel technique to NIL, was also developed, and its applications on ferroelectric polymers as well as metals are reviewed. Therefore, it is necessary to emphasize that this review is mainly attempted to review the applications of NIL/embossing instead of NIL technique advances.

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Section: Nil For T-shape Gates and Hemtsmentioning

confidence: 99%

Applications of nanoimprint lithography/hot embossing: a review

Chen

2015

Appl. Phys. A

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“…Polycrystalline-silicon thin-film transistors (poly-Si TFTs) are potential devices for various applications, including active-matrix organic light-emitting diodes (AMOLEDs), active-matrix liquid crystal displays (AMLCDs), [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] nonvolatile memories, [17][18][19] sensors, 20 and three-dimensional (3D) integrated circuits (ICs). [21][22][23][24][25] Poly-Si TFTs with the modified channels, such as the nanowire (NW), [9][10][11][12] multigate, 24 finlike, 15,16 and bridge-grain (BG) TFTs, 13,14 have been proposed to improve electrical performance.…”

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confidence: 99%

Poly-Si Thin-Film Transistors with N-Type Line-Array Doping Channels Fabricated by Nanoimprint Lithography

Chen

Huang

Lee

2019

ECS J. Solid State Sci. Technol.

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This study focuses on the characteristics of polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) with n-type line-array doping channels manufactured by nanoimprint lithography. Array doping patterns with a line width/space of approximately ∼400-800 nm were fabricated by ion implantation through a poly(methyl methacrylate) mask patterned with the nanoimprint technology. The proposed TFTs show a lower threshold voltage, higher ON/OFF ratio, better subthreshold swing, higher field-effect mobility, lower gate-induced drain leakage, and reduced kink-effect compared with the conventional single-channel ones. The high implantation dosage effects of line-array doping were also investigated. This method can be applied to fabricate high-performance poly-Si TFTs in the future.

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Ion-Sensitive Field-Effect Transistors With Periodic-Groove Channels Fabricated Using Nanoimprint Lithography

Chen

2013

IEEE Electron Device Lett.

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Nonvolatile Polycrystalline-Silicon Thin-Film-Transistor Silicon–Oxide–Nitride–Oxide–Silicon Memory with Periodical Finlike Channels Fabricated Using Nanoimprint Technology

Cited by 3 publications

References 20 publications

Applications of nanoimprint lithography/hot embossing: a review

Applications of nanoimprint lithography/hot embossing: a review

Poly-Si Thin-Film Transistors with N-Type Line-Array Doping Channels Fabricated by Nanoimprint Lithography

Ion-Sensitive Field-Effect Transistors With Periodic-Groove Channels Fabricated Using Nanoimprint Lithography

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