Normally-Off AlGaN/GaN High Electron Mobility Transistors with Thin and High Al Composition Barrier Layers

Abstract

A GaN-based enhancement-mode high electron mobility transistor (HEMT) with a 1.5 nm GaN/9 nm Al0.65Ga0.35N thin barrier was reported. Without any treatment on barrier layer under the gate, the as-grown HEMTs exhibited a threshold voltage of 0.3 V, a maximum drain current density of 441 mA/mm at V GS = 3 V and a peak extrinsic transconductance of 204 mS/mm at V GS = 1.1 V. At the same time, both a low Schottky leakage current and an insignificant surface defects induced current dispersion were observed. Moreover, drain induction barrier lower (DIBL) effect was determined to be merely 3.28 mV/V at 1 mA/mm for a gate length of 0.5 µm. Additionally, post-gate annealing experiment at step temperatures up to 450 °C was implemented, only causing a minor shift in threshold voltage. These results demonstrated the substantial potential of thin and high Al composition barrier layers for high-voltage and highly reliable enhancement mode operation.

Enhancement‐mode AlGaN/GaN HEMTs with thin and high Al composition barrier layers using O2 plasma implantation

“…A threshold voltage of +1 V extracted by the linear extrapolation of the I DS – V GS curve is obtained for E‐mode HEMTs, corresponding to a V TH shift of 1.5 V from the normally on counterparts. The saturation current is 424 mA mm −1 at V GS = 3 V, comparable to the result of fresh HEMTs having a higher Al content barrier without any treatment . The maximum transconductance ( g m ) exceeds 230 mS mm −1 as a result of the combination of the scaled barrier layer and the expected low‐damage treatment.…”

“…. Nevertheless, both kinds of HEMTs suffer from a relatively significant drain lag effect due to hot‐carrier injection into deep‐level traps in the buffer .…”

“…Device fabrication started with device isolation achieved by mesa etching in a Cl 2 plasma and, subsequently, Ti/Al/Ni/Au Ohmic contact formation. The lower Al content resulted in a dramatically improved R c of 0.4 Ω mm over 3.2 Ω mm in the previous report . A 60 nm Si 3 N 4 passivation layer was then deposited on top of the wafer by plasma‐enhanced chemical vapor deposition (PECVD).…”

“…Moreover, fabrication of GaN‐based monolithic integrated depletion‐/enhancement‐mode digital circuits as well as single‐polarity supply voltage RF/microwave circuits can also benefit a lot from high‐performance E‐mode HEMTs. Several advancements to achieve the normally off operation of AlGaN/GaN HEMTs have been reported, such as conventional gate recess , fluorine plasma treatment , p‐type gate structure , ultrathin barrier design , thermal or plasma oxidation recess , GaN MISFET , and non‐polar heterojunction design . Still, fabrication techniques, which allow for monolithic integration of high‐performance E/D‐mode devices with simplicity and low‐cost, remain challenging.…”

Enhancement mode operation in AlInN/GaN (MIS)HEMTs on Si substrates using a fluorine implant

“…Also, there is interest in developing normally-off GaN based HEMTs for RF, logic and gate drive circuit applications because of simpler circuit configurations, 2 reduced circuit size and fail safe operation [3]. Several techniques have been used to achieve enhancement mode operation in AlGaN/GaN devices including gate recessing [4], use of p-type cap layers [5], oxidation of the barrier [6], thin barrier structures [7] and incorporation of fluorine ions in the barrier region [8]. Each technology has its own merits and drawbacks and there is no clear winner for the development of the ultimate enhancement mode transistor.…”