Normally‐off GaN MOSFETs with high‐k dielectric CeO<sub>2</sub> films deposited by RF sputtering

Ogawa, Hiroki; Okazaki, Takuya; Kasai, Hayao; Hara, Kenta; Notani, Yuki; Yamamoto, Yasuhiro; Nakamura, Tohru

doi:10.1002/pssc.201300314

Cited by 5 publications

(3 citation statements)

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“…The cell pitch of the power DMOSFET was 40 μm for the gate width of 100 μm ( Figure 9 , right side). A low sheet resistance of 139 Ω/square and a contact resistance as low as 0.53 Ω·mm for the n + source regions were obtained [ 25 ]. Ohmic contact to the surface of the Mg ion-implanted regions could not be formed, because the carrier concentration of the Mg ion-implanted contact layer was estimated to be below 1 × 10 18 cm −3 due to an Mg acceptor level as deep as 200 meV [ 26 ].…”

Section: Device Performances and Discussionmentioning

confidence: 99%

Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

et al. 2019

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A normally-off GaN double-implanted vertical MOSFET (DMOSFET) with an atomic layer deposition (ALD)-Al2O3 gate dielectric film on a free-standing GaN substrate fabricated by triple ion implantation is presented. The DMOSFET was formed with Si ion implanted source regions in a Mg ion implanted p-type base with N ion implanted termination regions. A maximum drain current of 115 mA/mm, maximum transconductance of 19 mS/mm at a drain voltage of 15 V, and a threshold voltage of 3.6 V were obtained for the fabricated DMOSFET with a gate length of 0.4 μm with an estimated p-type base Mg surface concentration of 5 × 1018 cm−3. The difference between calculated and measured Vths could be due to the activation ratio of ion-implanted Mg as well as Fermi level pinning and the interface state density. On-resistance of 9.3 mΩ·cm2 estimated from the linear region was also attained. Blocking voltage at off-state was 213 V. The fully ion implanted GaN DMOSFET is a promising candidate for future high-voltage and high-power applications.

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Section: Device Performances and Discussionmentioning

confidence: 99%

Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

et al. 2019

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“…The sheet and contact resistances of the ion-implanted source regions were measured using a TLM structure. A low sheet resistance of 139 Ω/Υ and a contact resistance as low as 0.53 Ω mm were obtained [ 32 ]. Ohmic contact to the surface of the Mg-ion-implanted regions could not be formed because the carrier concentration of the Mg-ion-implanted contact layer was estimated to be below 1 × 10 18 cm −3 due to a Mg acceptor level as deep as 200 meV [ 33 ].…”

Section: Device Performancementioning

confidence: 99%

Breakdown Characteristics of GaN DMISFETs Fabricated via Mg, Si and N Triple Ion Implantation

Nakamura,

Yoshino,

Toyabe

et al. 2024

Micromachines

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Mg-ion-implanted layers in a GaN substrate after annealing were investigated. Implanted Mg atoms precipitated along the edges of crystal defects were observed using 3D-APT. The breakdown characteristics of a GaN double-diffused vertical MISFET (DMISFET) fabricated via triple ion implantation are presented. A DMISFET with Si-ion-implanted source regions was formed in Mg-ion-implanted p-base regions, which were isolated from adjacent devices by N-ion-implanted edge termination regions. A threshold voltage of −0.5 V was obtained at a drain voltage of 0.5 V for the fabricated vertical MISFET with an estimated Mg surface concentration of 5 × 1018 cm−3. The maximum drain current and maximum transconductance in a saturation region of Vds = 100 V were 2.8 mA/mm and 0.5 mS/mm at a gate voltage of 15 V, respectively. The breakdown voltage in the off-state was 417 V. The breakdown points were determined by the boundary regions between the N- and Mg-implanted regions. By improving heat annealing methods, ion-implanted GaN DMISFETs can be a promising candidate for future high-voltage and high-power applications.

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“…Metal-insulator-semiconductor HEMTs (MIS-HEMTs) are highly preferred over Schottky-gate HEMTs for high-voltage power switches, owing to the suppressed gate leakage and enlarged gate swing. Various dielectric materials were adopted for the gate insulator, such as aluminium oxide deposited by atomic layer deposition (ALD) [4][5][6], PECVD-silicon nitride (SiN x ) [7], PE-ALD SiN x [8], titanium oxide deposited by non-vacuum ultrasonic spray pyrolysis [9] and cerium oxide [10] films deposited by radio-frequency sputtering. However, it remains challenging to obtain low and stable gate leakage characteristics and suppress current collapse effects simultaneously.…”

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16.8 A/600 V AlGaN/GaN MIS‐HEMTs employing LPCVD‐Si ₃ N ₄ as gate insulator

Zhang

Tan

et al. 2015

Electron. lett.

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An AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) on Si substrate was obtained with 18 nm silicon nitride (Si 3 N 4) grown by low-pressure chemical vapour deposition (LPCVD) as the gate insulator. The D-mode MIS-HEMT shows a high I dss of 16.8 A at V g = 3 V, a high breakdown voltage (BV) of 600 V and a low-specific on-resistance of 2.3 mΩ•cm 2. The power device figure of merit (FOM = BV 2 /R on,sp) is calculated as 157 MW•cm −2. The good insulation effects of LPCVD-Si 3 N 4 were also demonstrated by the low gate leakage current of 154 nA at V ds = 600 V and V gs = −14 V. Furthermore, an E-mode device was realised by a low-voltage silicon metal-oxidesemiconductor field-effect transistor in series; the V th was determined to be 2.6 V. The high I dss , low-specific on-resistance, high BV and positive V th show the potential and advantages of GaN MIS-HEMTs for power switching applications. BE2013002-2) and by the Jiangsu Science and Technology Support Program (grant no. BE2012079). We thank the Suzhou nanofabrication facility of SINANO, CAS, for the fabrication, characterisation and testing of the AlGaN/GaN MIS-HEMT.

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Normally‐off GaN MOSFETs with high‐k dielectric CeO₂ films deposited by RF sputtering

Cited by 5 publications

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Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

Breakdown Characteristics of GaN DMISFETs Fabricated via Mg, Si and N Triple Ion Implantation

16.8 A/600 V AlGaN/GaN MIS‐HEMTs employing LPCVD‐Si ₃ N ₄ as gate insulator

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Normally‐off GaN MOSFETs with high‐k dielectric CeO2 films deposited by RF sputtering

Cited by 5 publications

References 0 publications

Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

Breakdown Characteristics of GaN DMISFETs Fabricated via Mg, Si and N Triple Ion Implantation

16.8 A/600 V AlGaN/GaN MIS‐HEMTs employing LPCVD‐Si 3 N 4 as gate insulator

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Product

Resources

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Normally‐off GaN MOSFETs with high‐k dielectric CeO₂ films deposited by RF sputtering

16.8 A/600 V AlGaN/GaN MIS‐HEMTs employing LPCVD‐Si ₃ N ₄ as gate insulator