2011
DOI: 10.1016/j.mejo.2011.04.016
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Novel hybrid D/A structures for high-resolution SAR ADCs—analysis, modeling and realization

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Cited by 5 publications
(2 citation statements)
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“…The proposed hybrid capacitor array and resistor string architecture that is implemented in a segmented manner enables the DAC resolution to be enhanced via the combination of different types of sub-DACs together. The data taken from the previous study by Xingyuan et al, [4] have shown that these methods are widely implemented in high-resolution SAR ADCs of 12 bits or greater. These types of circuits are also highly sought after in line with the advancement of wireless sensor networks and very-large-scale integration (VLSI) applications, which correlates with the reviews performed by Chen et al, [5], Gaddam et al, [6] and Fan [7].…”
Section: Introductionmentioning
confidence: 99%
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“…The proposed hybrid capacitor array and resistor string architecture that is implemented in a segmented manner enables the DAC resolution to be enhanced via the combination of different types of sub-DACs together. The data taken from the previous study by Xingyuan et al, [4] have shown that these methods are widely implemented in high-resolution SAR ADCs of 12 bits or greater. These types of circuits are also highly sought after in line with the advancement of wireless sensor networks and very-large-scale integration (VLSI) applications, which correlates with the reviews performed by Chen et al, [5], Gaddam et al, [6] and Fan [7].…”
Section: Introductionmentioning
confidence: 99%
“…Additionally, the work performed by Ma et al, [8] has revealed that the implementation of this hybrid architecture has the unique advantage of allowing designers to introduce different types of methods to optimize each sub-DAC based on their individual design requirements and other uncorrelated process parameters, thereby enabling the overall performance of the full DAC circuit to be adequately enhanced. Furthermore, the work carried out by Kim et al, [9] explained that the separation of the resolution bits across two distinct components is mutually beneficial to both sub-DACs as it helps to relax the matching requirement of the 10-bit RDAC (only used for the 10 LSBs) by a factor of 2 4 , whereas it reduces the total unit capacitors required for the 4-bit CDAC (only used for the 4 MSBs) by a factor of 2 10 . This would enable the overall die area to be substantially reduced as the number of DAC components tend to increase exponentially with resolution without the presence of segmented circuit arrays.…”
Section: Introductionmentioning
confidence: 99%