Novel Process and Temperature-Stable, IDD Sensor for the BIST Design of Embedded Digital, Analog, and Mixed-Signal Circuits

Abstract

This paper proposes a new IDD sensor for built-in self-test (BIST) applications for digital, analog, and mixedsignal circuits. This novel, wide-band, nonintrusive, process and temperature-stable IDD sensor operates up to 230 MHz, which is 2.3 faster than previously proposed designs, and occupies 78.3% less area than another competing design. A BIST utilizing this novel IDD sensor is created and tested on numerous digital circuits, as well as on an op-amp and a mixer, achieving up to 90% fault coverage, while maintaining the performance of the circuitunder-test. The experiments were implemented in 0.18-m TSMC CMOS mixed-signal technology.Index Terms-Built-in self-test (BIST), CMOS mixed-signal circuits, design for testability (DFT), sensor.

DARS: An EDA Framework for Reliability and Functional Safety Management of System-on-Chips

“…Temperature sensors [28] sensors and monitors Voltage noise monitor [29] Current (I DDx ) sensor [26] Aging sensors NBTI degradation sensor [30] and monitors Oxide degradation sensor [31] Delay monitors [32] Logic monitors Performance counters [33] NoC monitors [34] Built-In-Self-Test…”

“…Instruments might be embedded at the module level, where they are responsible for module-level monitoring or adaptation [25]. Alternatively, instruments might be embedded at the system (chip) level [26] or at the interconnect level [27]. Those EIs are increasingly heterogeneous, for example, Table II shows a non-exhaustive list of EIs that can be used for RaS management.…”

A CMOS Ripple Detector for Voltage Regulator Testing

“…Figure 2 shows common source and source follower amplifier stages operating with equal gain and output bias levels. They are used to obtain two out of phase inputs for the differential amplifiers [5,10]. The reason for including the source follower stage is to ensure both signals experience identical latency at 200 MHz, leading to a 180°phase difference.…”

“…The final stages of the amplifier shown in Fig. 3 are the two identical, PMOS driven, current-mirror loaded differential pairs for amplification and to provide a differential output for full-wave rectification [5,10]. PMOS drivers were chosen for their better noise performance and immunity to body effect when separate wells are used for the two drivers.…”