Novel Silver Solid-State Bonding Designs Between Two Copper Structures

Lee, Chin C.

doi:10.1109/tcpmt.2016.2628908

IEEE Trans. Compon., Packag. Manufact. Technol.

2017

DOI: 10.1109/tcpmt.2016.2628908

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Novel Silver Solid-State Bonding Designs Between Two Copper Structures

Chin C. Lee

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2018

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“…Silicon (Si) chips were bonded to copper (Cu) substrates using 10 µm Ag layer [15]. Neither solder nor flux was used.…”

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confidence: 99%

Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches

Lee

2018

J Mater Sci: Mater Electron

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Silicon (Si) chips of 5 mm × 5 mm were bonded directly to copper (Cu) substrates using solid-state process at 300 °C without using any die-attach materials. A static pressure of 6.9 MPa was applied. To deal with the large mismatch in coefficient of thermal expansion (CTE) between Si and Cu, graded circular micro-trenches were fabricated on the Cu substrates. The micro-trenches provide space for Cu material to move into during the bonding process where the Cu surface incurs plastic deformation to conform to Si bottom surface for intimate contact. The micro-trenches also help relax stresses on the bonding interface caused by the fact that Cu contracts significantly more than Si during cooling down. The results obtained are encouraging, implying that the concept of using micro-trenches work. Scanning electron microscopy (SEM) images on cross sections of bonded structures show that Si chips were well bonded to Cu substrates without voids or defects on the interface and without any cracks on Si chip. Shear test were performed on six samples. It turned out that, of all six samples, the Si chip fractured first and the entire Si bottom surface was stilled well bonded to the Cu substrate. The average breakage force of Si chips on six samples is 13.5 Kgf. The breakage force of the joint cannot be determined but is certainly higher than 13.5 Kgf, which is more than twice of the specification American Military Standard. The new chip bonding structure with solid-state process reported in this paper eliminates the use of die-attach materials and the thermal resistance associated with the dieattach. It also removes the operating temperature limit constrained by the melting temperature of die-attach materials. We except this new bonding structure design to be a valuable alternative to high power and high temperature devices.

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“…Silicon (Si) chips were bonded to copper (Cu) substrates using 10 µm Ag layer [15]. Neither solder nor flux was used.…”

mentioning

confidence: 99%

Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches

Lee

2018

J Mater Sci: Mater Electron

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Novel Silver Solid-State Bonding Designs Between Two Copper Structures

Cited by 1 publication

References 21 publications

Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches

Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches

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