NUcache: An efficient multicore cache organization based on Next-Use distance

Manikantan, R.; Rajan, Kaushik Sunder; Govindarajan, Raghav

doi:10.1109/hpca.2011.5749733

Cited by 34 publications

(19 citation statements)

References 21 publications

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“…BIP [11] inserts an incoming block at the MRU position of the target set with a low probability and the LRU position with the high probability . In contrast, the Next-Use Cache (NUCACHE) scheme [8] makes use of the locality characteristics of individual load instructions (identified by their PCs) and selects a small group of these instructions through a cost-benefit analysis, allowing their blocks to stay longer in the SLLC by a new (FIFO) replacement policy.…”

Section: Sllc Capacity Managementmentioning

confidence: 99%

“…We categorize these studies into two groups: those proposing alternatives to the LRU replacement policy [3]- [8] and those proposing cache partitioning schemes [9], [10].…”

Section: Introductionmentioning

confidence: 99%

“…Alternative replacement policies, such as TADIP [3] and NUCACHE [8], are proposed to overcome the thrashing problem by judiciously assigning and adjusting lifetimes for cached blocks.…”

Section: Introductionmentioning

confidence: 99%

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CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches

Zhan

Jiang

Seth

2014

IEEE Trans. Comput.

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Abstract-Most chip-multiprocessors nowadays adopt a large shared last-level cache (SLLC). This paper is motivated by our analysis and evaluation of state-of-the-art cache management proposals which reveal a common weakness. That is, the existing alternative replacement policies and cache partitioning schemes, targeted at optimizing either locality or utility of co-scheduled threads, cannot deliver consistently the best performance under a variety of workloads. Therefore, we propose a novel adaptive scheme, called CLU, to interactively co-optimize the locality and utility of co-scheduled threads in thread-aware SLLC capacity management. CLU employs lightweight monitors to dynamically profile the LRU (least recently used) and BIP (bimodal insertion policy) hit curves of individual threads on runtime, enabling the scheme to co-optimize the locality and utility of concurrent threads and thus adapt to more diverse workloads than the existing approaches. We provide results from extensive execution-driven simulation experiments to demonstrate the feasibility and efficacy of CLU over the existing approaches (TADIP, NUCACHE, TA-DRRIP, UCP, and PIPP).

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Section: Sllc Capacity Managementmentioning

confidence: 99%

“…We categorize these studies into two groups: those proposing alternatives to the LRU replacement policy [3]- [8] and those proposing cache partitioning schemes [9], [10].…”

Section: Introductionmentioning

confidence: 99%

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CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches

Zhan

Jiang

Seth

2014

IEEE Trans. Comput.

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“…For a 1024-entry BDCT, the lower 10 bits of PC are used to index the BDCT. Like all PC based methods [17,19,20,21,23,35,37], the shortened PC is delivered along with the request through the cache hierarchies.…”

Section: Implementation Detailsmentioning

confidence: 99%

“…It classifies blocks based on their access number in the L2 cache and the hit number in the LLC. NUcache [23] dedicates a part of LLC to keep distant reuse blocks. Only blocks accessed by selected PCs are inserted into the dedicated part, and the others are bypassed.…”

Section: Related Workmentioning

confidence: 99%

Optimal bypass monitor for high performance last-level caches

Tong

Xie

et al. 2012

Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques

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In the last-level cache, large amounts of blocks have reuse distances greater than the available cache capacity. Cache performance and efficiency can be improved if some subset of these distant reuse blocks can reside in the cache longer. The bypass technique is an effective and attractive solution that prevents the insertion of harmful blocks.Our analysis shows that bypass can contribute significant performance improvement, and the optimal bypass can achieve similar performance compared to OPT+B, which is the theoretical optimal replacement policy. Thus, we propose a bypass technique called Optimal Bypass Monitor (OBM), which makes bypass decisions by learning and predicting the behavior of the optimal bypass. OBM keeps a short global track of the incoming-victim block pairs. By detecting the first reuse block in each pair, the behavior of the optimal bypass on the track can be asserted to guide the bypass choice.Any existing replacement policy can be extended with OBM while requiring negligible design modification. Our experimental results show that using less than 1.5KB extra memory, OBM with the NRU replacement policy outperforms LRU by 9.7% and 8.9% for single-thread and multiprogrammed workloads respectively. Compared with other state-of-the-art proposals such as DRRIP and SDBP, it achieves superior performance with less storage overhead.

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Multi-Core Cache Hierarchies

Balasubramonian

Jouppi

2011

Synthesis Lectures on Computer Architecture

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NUcache: An efficient multicore cache organization based on Next-Use distance

Cited by 34 publications

References 21 publications

CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches

CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches

Optimal bypass monitor for high performance last-level caches

Multi-Core Cache Hierarchies

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