Numerical simulation and validation of subsurface modification and crack formation induced by nanosecond-pulsed laser processing in monocrystalline silicon

Kiyota, Hiroki; Hara, Katsuo; Jankowski, Marc; Fejer, M. M.

doi:10.1063/1.5130701

Cited by 18 publications

(10 citation statements)

References 34 publications

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“…The molten SiC begins to recrystallize under the compressive stress due to the restriction of low temperature area, and the melting can go on in the cooling process, solidification and polycrystallization will occur with further temperature decline. 31 An extremely powerful compressive stress is generated in the SD layer, probably because the SD layer is formed with a high aspect ratio, a powerful tensile stress is generated at the top and bottom of the SD layer, the cracks will grow toward the surface and bottom of chip. 8 Moreover, the microcracks generated by stress accumulation around the disordered region are the key factor in the separation.…”

Section: Results and Analysismentioning

confidence: 99%

“…Wang X. et al 16 found the morphology of internal modification depends on the laser pulse energy, scanning speed, repetition rate and input beam shape and so on. Kiyota H. et al 17 described a numerical simulation of modification and crack formation in silicon. For thicker wafer, multi-layer is applied because a single modified layer is not enough to separate the chips.…”

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confidence: 99%

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Investigation on the Processing Quality of Nanosecond Laser Stealth Dicing for 4H-SiC Wafer

Song¹,

Zhang²,

Xu³

et al. 2023

ECS J. Solid State Sci. Technol.

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Silicon carbide (SiC), due to its characteristic materials performance, gets more attention in Radio Frequecy (RC) and High-power device fabrication. However, SiC wafer dicing has been a tricky task because of the high hardness and brittleness. The blade dicing suffers from poor efficiency and debris contaminants. Furthermore, the laser ablation dicing and Thermal Laser Separation (TSL) can have thermal damage and irregular crack propagation. In this study, Stealth Dicing (SD) with nanosecond pulse laser method was applied to 4H-SiC wafer. A series of experiments were conducted to analyze the influences of different parameters on cross section and surface. An edge defect less than 3 μm and cross section with roughness of about 0.8 μm was achieved. And the three-point stress test was applied to obtain the die strength. Besides, a novel method of double pulse inducing cracks growth was proposed for the first time to optimize the surface edge. Finite Element Analysis (FEA) verifed the feasibility. Through experiments, the edge defect decreased to less than 2 μm. This work contributes to the wafer Stealth Dicing application for SiC and advance semiconductor materials.

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Section: Results and Analysismentioning

confidence: 99%

mentioning

confidence: 99%

Investigation on the Processing Quality of Nanosecond Laser Stealth Dicing for 4H-SiC Wafer

Song¹,

Zhang²,

Xu³

et al. 2023

ECS J. Solid State Sci. Technol.

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“…We presume that similar phenomenon occurred in our case, while laser wavelength was different. Another possibility might be a phenomena related to the propagation of the absorption front to the upstream of the incoming laser 27 , 28 . In this case, however, the speed of propagation is about 1 ns or less, thus it is difficult to explain the total length of the observed modified spots considering the pulse duration of 0.5 ns in the present study.…”

Section: Resultsmentioning

confidence: 99%

Inscribing diffraction grating inside silicon substrate using a subnanosecond laser in one photon absorption wavelength

Sugimoto

Matsuo

Naoi

2020

Sci Rep

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Using focused subnanosecond laser pulses at $$1.064\,\upmu \hbox {m}$$ 1.064 μ m wavelength, modification of silicon into opaque state was induced. While silicon exhibits one-photon absorption at this wavelength, the modification was induced inside $$300\,\upmu \hbox {m}$$ 300 μ m -thick silicon substrate without damaging top or bottom surfaces. The depth range of the focus position was investigated where inside of the substrate can be modified without damaging the surfaces. Using this technique, diffraction gratings were inscribed inside silicon substrate. Diffraction from the gratings were observed, and the diffraction angle well agreed with the theoretical value. These results demonstrate that this technique could be used for fabricating infrared optical elements in silicon.

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“…At present, scholars have also made some progress in the simulation of residual stress. Kiyota et al [19] proposed a model to compute the mechanical stress and the geometry of the cracks formed by subsurface nanosecond-pulsed laser modification within monocrystalline silicon wafers, and confirmed the residual stress generation due to material transfer caused by volume reduction during melting and resolidification to be the dominant factor in creating subsurface mechanical stress and cracks. Zhang et al [20] established a thermodynamic coupling cutting simulation model for twodimensional orthogonal cutting of titanium alloy based on J-C constitutive through ABAQUS, and analyzed the distribution of residual stress under ultrasonic vibration cutting and conventional cutting.…”

Section: Introductionmentioning

confidence: 97%

The surface residual stress of monocrystalline silicon in ultrasonic vibration–assisted diamond wire sawing

Wang

Zhao²,

Li³

et al. 2022

Int J Adv Manuf Technol

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Monocrystalline silicon wafer is the most important raw material in chip manufacturing, wire sawing is the most common processing method of monocrystalline silicon wafer. The residual stress generated by cutting affects the subsequent polishing costs directly, as well as the fracture strength and mechanical integrity of the monocrystalline silicon wafer, thus affecting the service performance. In this paper, the generation mechanism of residual stress was analyzed based on diamond wire sawing technology. Then, based on D-P plastic constitutive model, the magnitude and distribution of residual stress of monocrystalline silicon chip under different process parameters were simulated by ABAQUS simulation software. Finally, the experiment of ultrasonic vibration assisted diamond wire sawing monocrystalline silicon and blind hole drilling method detection were conducted, the strain values before and after drilling in three directions were measured by strain gauge rosette, and the residual stress was calculated by combining with mathematical theory, and the experimental results verified the validity of the finite element model. The experimental results showed that residual compressive stress remains on the surface of silicon wafer in both conventional wire sawing and ultrasonic vibration assisted wire sawing. The residual compressive stress increases with the increase of the axial speed of wire saw, decreases with the increase of the wire saw feed speed, and fluctuates with the increase of the workpiece rotation speed. The residual compressive stress on the surface of the silicon wafer by ultrasonic vibration assisted wire sawing is larger than that by conventional wire sawing. The variation trend of simulation and experiment results is consistent, which provides theoretical support for the subsequent processing of monocrystalline silicon wafers.

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Numerical simulation and validation of subsurface modification and crack formation induced by nanosecond-pulsed laser processing in monocrystalline silicon

Cited by 18 publications

References 34 publications

Investigation on the Processing Quality of Nanosecond Laser Stealth Dicing for 4H-SiC Wafer

Investigation on the Processing Quality of Nanosecond Laser Stealth Dicing for 4H-SiC Wafer

Inscribing diffraction grating inside silicon substrate using a subnanosecond laser in one photon absorption wavelength

The surface residual stress of monocrystalline silicon in ultrasonic vibration–assisted diamond wire sawing

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