SUMMARY
We consider model order reduction of integrated circuits with semiconductor devices. Such circuits are modeled using modified nodal analysis by differential‐algebraic equations coupled with the nonlinear drift‐diffusion equations. A spatial discretization of these equations with a mixed finite element method yields a high dimensional nonlinear system of differential‐algebraic equations. Balancing‐related model reduction is used to reduce the dimension of the decoupled linear network equations, whereas the semidiscretized semiconductor model is reduced using proper orthogonal decomposition. Because the computational complexity of the reduced‐order model through the nonlinearity of the drift‐diffusion equations still depends on the number of variables of the full model, we apply the discrete empirical interpolation method to further reduce the computational complexity. We provide numerical comparisons that demonstrate the performance of the presented model reduction approach. Copyright © 2012 John Wiley & Sons, Ltd.