In this work, high-performance TiN metal nanocrystal nonvolatile memories using a p + poly-Si gate and a Al 2 O 3 blocking dielectric layer with trigate structure are fabricated on silicon-on-insulator substrate. Devices with moderate transistor performance and superior memory properties are demonstrated. A memory window as high as 5 V is achieved after Program/Ease ͑P/E͒ operation at Ϯ10 V for 0.1 s, with only 18 and 33% charge loss at room temperature and at 85°C after 10 years storage. Only +0.5 V window shift and almost no window narrowing after 10 5 P/E operations can be obtained. Furthermore, a device with larger nanocrystals has better P/E characteristics and superior retention performance.Floating gate ͑FG͒ devices are widely applied in present nonvolatile memories ͑NVMs͒ for data storage. However, the International Technology Roadmap for Semiconductors forecasts several critical challenges that would limit the scaling of the conventional FG memories below sub-40 nm node, such as unwanted FG coupling effect and high operation voltage because of the thick tunneling oxide. 1 Therefore, for further scaling, NAND flash technology is predicted to migrate to charge-trapping devices with discrete trap storage, such as silicon-oxide-nitride-oxide-silicon ͑SONOS͒ and nanocrystal ͑NC͒ structures. 2-14 For SONOS memories, one of the major drawbacks is the erase saturation. NC memories, which use various materials as the storage node, have become one of the possible solutions for future NVM applications. They still present some challenges, such as how to form NCs with high density, constant size, and uniform distribution. 4 For NC memories, metal NCs have more work-function engineering ability and higher density of state around the Fermi level than semiconductor NCs. Therefore, metal NC memory cells are reported to exhibit superior memory characteristics to semiconductor NC memory cells. [4][5][6][7][8] Recently, multigate field effect transistors ͑MuGFETs͒ were predicted as one of the most promising solutions for NAND Flash beyond the 25 nm node. 1 Some literature has reported the fact that memory cells can achieve excellent short channel effect controllability, high driving current, low leakage current, better programming characteristics, and a larger number of NCs in one cell. [8][9][10][11][12] In addition, erase characteristics can be enhanced using high work function gate electrode and high-k dielectric as a blocking oxide layer to suppress the unwanted backward injection effect. 12 In this work, n-channel trigate NVM using TiN metal NCs as the trapping storage, a Al 2 O 3 high-k blocking dielectric layer, and a p + poly-Si gate electrode is shown to successfully exhibit a large memory window as well as good retention and endurance performance.
ExperimentalFirst, n-channel trigate TiN nano-crystal memory ͑NCMs͒ were fabricated on a 6 in. Simox silicon-on-insulator ͑SOI͒ wafer with a lightly boron-doped SOI layer with a concentration around 1 ϫ 15 cm −3 . The thicknesses of the SOI layer and buried oxide layer a...