Obsolescence in EMC Risk Assessment: A Case Study on EFT Immunity of Microcontrollers

Abstract

This paper investigates the obsolescence in EMC risk assessment by conducting an experimental case study on two commercially available Atmel microcontrollers (µCs), i.e. SAM3 and SAM7, the former being more recent but still pin-to-pin compatible. To this end, electrical fast transient (EFT) testing was performed according to the IEC 61000-4-4 standard to identify and clarify the failure occurring in the µCs individual voltage supply pins. The µC crash was considered as the immunity criterion to monitor the failure due to the EFT bursts. Results demonstrate, in a reproducible manner, that SAM3 was more immune to transient disturbances compared to SAM7 on all the considered supply pins, excluding the phase-locked loop. Moreover, regardless of the µC version, the core supply pin was found to be the most susceptible to EFT injection. These results show that replacing a SAM7 µC by a SAM3 µC calls for a detailed EMC analysis, particularly when dealing with obsolescence, since a more modern, compatible IC does not necessarily provide a higher immunity.

Influence of Temperature on the EFT Immunity of Multistage Integrated Oscillators

“…In this paper, the failure criterion is a ±10% deviation from the nominal output frequencies of the multi-stage CSVCO and RO at ambient and extreme temperatures. EFT failure modes, previously defined in [30] for microcontrollers, are redefined here to evaluate the EFT immunity of the integrated oscillators. The apparent failure types classified from A to E are the following:…”