Off‐State Current Improvement of Double‐Gate Junctionless Field‐Effect Transistor by Modifying Central Potential

Abstract

This work presents a double‐gate junctionless metal‐oxide field‐effect transistor (JLT) in a 20 nm regime by modifying central potential. In the proposed device, the off‐state current is reduced due to modifying the potential in the middle of the channel. The proposed structure is called as a modified central potential junctionless transistor (MCP‐JLT). The suggested device embeds two dielectric pockets (DPs) into the middle of the channel. The proposed technique has several effects on the proposed structure. Also, the impact of the DPs into the channel on the performance device is discussed. The proposed MCP‐JLT structure decreases the off‐state current (IOFF) by three orders of magnitude; besides, it can suppress the lateral electric field and also slightly reduces the drive current (ION), and reduces subthreshold swing (SS) compared to a typical junctionless FET (C‐JLT). Furthermore, the effect of the gate insulator materials on the proposed device's performance is discussed.

Synergic Effect of Misaligned Gate and Temperature on Hetero‐Dielectric Double‐Gate Junctionless Metal–Oxide‐Semiconductor Field‐Effect Transistors for High‐Frequency Application

“…However, the junctionless MOSFET takes a bold departure from this conventional approach. [12] It accepts a junctionless architecture, eliminating the complex fabrication steps associated with forming and doping junctions, and instead, unleashes DOI: 10.1002/pssa.202300607 Junctionless metal-oxide-semiconductor field-effect transistors (MOSFETs) have emerged as a promising alternative to conventional MOSFETs, offering simplified fabrication and potential performance improvements. The novelty of this research lies in the selection of hetero-dielectric material to optimize the performance of junctionless transistors under the misaligned gate and hightemperature conditions, and the aim is to explore its capability for low-power high-frequency application.…”

“…However, the junctionless MOSFET takes a bold departure from this conventional approach. [ 12 ] It accepts a junctionless architecture, eliminating the complex fabrication steps associated with forming and doping junctions, and instead, unleashes the power of a single‐channel design. By virtue of its simplicity, the junctionless MOSFET offers numerous advantages.…”