Offset mismatch calibration for TI-ADCs in high-speed OFDM systems

Abstract

Abstract-Time-interleaved analog-to-digital converters (TIADCs) are widely used for multi-Gigabit orthogonal frequency division multiplexing (OFDM) based systems because of their attractive high sampling rate and high resolution. However, when not perfectly calibrated, mismatches such as offset mismatch, gain mismatch and timing mismatch between parallel sub-ADCs can significantly degrade the system performance. In this paper, we focus on offset mismatch. We analyze two calibration techniques for the offset mismatch, based on the least-squares (LS) and linear minimum mean-squared error (LMMSE) algorithms assuming an AWGN channel. The simulation results show that our method is capable of improving the BER performance. As expected, the LMMSE estimator outperforms the LS estimator. However, at large offset mismatch levels or low noise level, both estimators converge. In this paper, we derive the condition on the mismatch level for convergence between the two estimators.

Pilot-Based TI-ADC Mismatch Error Calibration for IR-UWB Receivers

“…Figure 4 shows the MSE = (1/N )( t−ˆ t) 2 of two estimated t with the method proposed in Section IV as a function of SNR (which for estimation purposes in this case is equivalent to adding more averaging in equation ( 31)). The estimated timing mismatch is calculated at a point of the gaussian pulse with low and high slope, respectively, for a training sequence of 2 10 = 1024 bits. The signal used for estimation is the received signal passed through the RMPF channel.…”

“…However, due to inaccuracies inherent to the manufacturing process that prevent the component ADCs from being exactly equal to each other, there are specific mismatches that can severely deteriorate the performance of the whole system. Thus, addressing three typical mismatches: gain, offset and timing skew, estimation and correction is required [4], [8]- [10]. Gain mismatch errors occur when the amplitude ratio between analog input and digital output differs for each ADC, whereas offset mismatch is due to different DC values at their output (even when the input is set to zero).…”