ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486) 2003
DOI: 10.1109/iccad.2003.159777
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On application of output masking to undetectable faults in synchronous sequential circuits with Design-For-Testability logic

Abstract: Design-for-testability (DFT ) for synchronous sequential circuits causes redundant faults in the original circuit to be detectable in the circuit with DFT logic. It has been argued that such faults should not be detected in order to avoid reducing the yield unnecessarily. One way to deal with such faults is to mask (or ignore) their fault effects when they appear on the circuit outputs, without masking the detection of faults that need to be detected. To investigate the extent to which this can be accomplished… Show more

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Cited by 8 publications
(2 citation statements)
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“…It is also possible to address overtesting by avoiding the detection of functionally undetectable faults [10, 11]. However, identifying all such faults has a high computational complexity.…”
Section: Introductionmentioning
confidence: 99%
“…It is also possible to address overtesting by avoiding the detection of functionally undetectable faults [10, 11]. However, identifying all such faults has a high computational complexity.…”
Section: Introductionmentioning
confidence: 99%
“…The procedure of [6] is accurate only about classifying a state as unreachable and may thus include non-functional broadside tests for some transition faults. The procedures of [7] and [8] attempt to avoid overtesting by avoiding the detection of undetectable faults. In [7], states necessary for the detection of undetectable faults are avoided.…”
Section: Introductionmentioning
confidence: 99%