2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) 2017
DOI: 10.1109/ahs.2017.8046377
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On-board processing using reconfigurable hardware on the solar orbiter PHI instrument

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Cited by 8 publications
(7 citation statements)
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“…RTE inversion, or a group of different image processing functions), and load them into the RFPGAs as needed. 7 To fulfil the requirement on easily changing the pipelines a block approach is taken. The blocks access the image processing functions running on the RFPGAs, or the microprocessor in back-up implementation, and combine them into useful steps.…”
Section: Implementation Of the Data Processing Systemmentioning
confidence: 99%
“…RTE inversion, or a group of different image processing functions), and load them into the RFPGAs as needed. 7 To fulfil the requirement on easily changing the pipelines a block approach is taken. The blocks access the image processing functions running on the RFPGAs, or the microprocessor in back-up implementation, and combine them into useful steps.…”
Section: Implementation Of the Data Processing Systemmentioning
confidence: 99%
“…While the HRT has the operational capability of a 60 second cadence, during the cruise phase a 96 second cadence was used. This was done using a PMP scheme of [4,5]. At each wavelength position, 4 frames are taken for each modulation state, and this is cycled through each modulation state 5 times, resulting in 20 total frames for each modulation state at each wavelength position.…”
Section: The Instrumentmentioning
confidence: 99%
“…During normal operations to conserve telemetry, the raw images from the two telescopes are reduced onboard using field-programmable gate array (FPGA) computers, producing the data products which are downlinked to Earth. 4,5 However there are occasions during the nominal and extended mission phases when telemetry rates will be favourable such that raw images can be downloaded and reduced on-ground. The ability to reduce data onground provides more opportunities for fine-tuning the data reduction process, and therefore for producing higher quality data products.…”
Section: Introductionmentioning
confidence: 99%
“…The lowermost layer (primitives) implements the image processing functions, e.g., addition of images or Fourier transform of an image. These are implemented both as RFPGA functionalities 32 and as software functions running on the system controller microprocessor. Due to the large number of functions one RFPGA configuration is not sufficient, therefore the RFPGA is reconfigured on demand, during the processing.…”
Section: Software Architecturementioning
confidence: 99%