Antennas and Propagation for 5G and Beyond 2020
DOI: 10.1049/pbte093e_ch6
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On-chip antenna: challenges and design considerations

Abstract: This book chapter focuses on on-chip antennas (OCA). The challenges associated with OCA design, implementation, and characterization are discussed in detail. In addition, this chapter highlights the research work that has been conducted in this field to date. This chapter concludes by proposing future research directions in the field of OCA.

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Cited by 7 publications
(7 citation statements)
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“…To make the antenna suitable for a real-case scenario, it requires some additional post-fabrication work to improve its gain characteristics. Though high resistive silicon can be used to improve the gain performance [43], the bulk CMOS process does not support such high resistive silicon [44]. The alternative and most suitable option for improving the OCA gain is to apply micromachining technique wherein a low index region is introduced underneath the radiating antenna by removing a portion of the Si wafer from its bottom.…”
Section: Gain Enhancementmentioning
confidence: 99%
“…To make the antenna suitable for a real-case scenario, it requires some additional post-fabrication work to improve its gain characteristics. Though high resistive silicon can be used to improve the gain performance [43], the bulk CMOS process does not support such high resistive silicon [44]. The alternative and most suitable option for improving the OCA gain is to apply micromachining technique wherein a low index region is introduced underneath the radiating antenna by removing a portion of the Si wafer from its bottom.…”
Section: Gain Enhancementmentioning
confidence: 99%
“…Though all the performance parameters can be achieved individually, maintaining a large bandwidth for all of them simultaneously can be challenging because of their interdependencies and tradeoffs, making the design a multidimensional optimization problem. Considerable research efforts have been made to tackle these design challenges of mmWave 5G phased arrays [7][8][9][10][11][12][13][14][15][16][17][18][19][20][21], summarized and compared in Table 1. However, most works have focused on only one or two performance parameters.…”
Section: Introductionmentioning
confidence: 99%
“…However, a major issue is the low gain and radiation efficiency because of the low resistivity (~10 Ω-cm) of the silicon (Si) substrate used in conventional CMOS processes [2,3]. In addition, the Si substrate has a high dielectric constant (~11.9) and is relatively thick, which couples most of the electromagnetic power into the substrate while exciting surface waves [4,5].…”
Section: Introductionmentioning
confidence: 99%