On-Chip Power-Efficient Current Flattening Circuit

Abstract

This paper presents a control circuit which regulates the current consumption of integrated circuits using current injection and voltage scaling techniques. The control circuit can be integrated with smart cards as a countermeasure against power analysis attacks and electromagnetic emanation analysis attacks. We have designed the proposed circuit in 0.18 μm CMOS technology at 1.8 V power supply. The simulation results show that the circuit controls the current through the power supply pin of a model of a smart card microcontroller and attenuates the peak-to-peak current variations by 95%. The power dissipation overhead of the control circuit is less than 20% of the original power dissipation of the smart card microcontroller. Comparing the layout area of the proposed circuit with that of an ASIC 3-DES algorithm in the same technology shows that the control circuit only constitutes 4% of the cryptographic processor. The proposed circuit proves to be especially useful for smart cards and small portable devices, where power dissipation and chip area are critical.

Design of Secure Microsystems Using Current-to-Data Dependency Analysis

“…In this paper, a method was proposed for designing DPA countermeasures based on current attenuation. This methodology has three stages: 1) estimating the required current attenuation for a specific level of robustness against DPA attacks; 2) designing a countermeasure circuit that attenuates the current signal within the expected value suggested in the first stage [5]; and 3) investigating the efficiency of the proposed countermeasure. This methodology is based on a new formula suggested for calculating NCT-DPA using the characteristics of the current signal used in a DPA attack and the external noise of the DPA attack measurement setup.…”

“…Countermeasures against DPA attacks [2][3][4] are either software-based or hardware-based, which, in turn, are based on circuit-level or system-level solutions [5]. Typically, system-level solutions assume that attenuating the variations of the power-supply current makes DPA attacks more difficult [5][6][7]. The number of current traces required for a successful DPA attack (hereafter NCT-DPA) is used to evaluate the robustness of a secure microsystem against DPA attacks or the effectiveness of a countermeasure.…”