On Generating Vectors That Invoke High Circuit Delays - Delay Testing and Dynamic Timing Analysis

Huang, I-De; Gupta, Sandeep K.

doi:10.1109/ats.2007.4388062

16th Asian Test Symposium (ATS 2007)

2007

DOI: 10.1109/ats.2007.4388062

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On Generating Vectors That Invoke High Circuit Delays - Delay Testing and Dynamic Timing Analysis

I-De Huang¹,

Sandeep K. Gupta²

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On Generating Vectors That Invoke High Circuit Delays - Delay Testing and Dynamic Timing Analysis

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