On hardware for computing exponential and trigonometric functions

Kantabutra, Vitit

doi:10.1109/12.485571

Cited by 63 publications

(16 citation statements)

References 19 publications

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“…Redundant and signed-digit representations or larger radix (Baker 1973, Ercegovac 1973, Tagagi et al 1991) are adopted to fasten the computation at each iteration stage. A technique is developed to derive the values of s i in (1) using the approximate value of lnð1 þ 2 Ài Þ (Kantabutra 1996). However, the convergence rate of these techniques is still linear.…”

Section: Introductionmentioning

confidence: 99%

“…However, as the desired precision of the exponential function increases, the above-mentioned methods will require either an exponential increase in the table size or a large number of large word-length multiplications and additions. The most popular hardware method for exponential computation is the CORDIC-like additive normalization method (Koren 1993), which is also referred to as the 'digit-by-digit' method in Kantabutra (1996).…”

Section: Introductionmentioning

confidence: 99%

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Efficient computation of very high effective-precision exponential function with additive normalization method

Chen

2011

Journal of the Chinese Institute of Engineers

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The previously proposed fast-convergence additive normalization method with exponential convergence rate for computing the exponential function 2 À0:v suffers from high hardware cost for obtaining the normalization factors. Furthermore, when the value of 0:v has many leading-zero bits, the hardware cost of the exponential computation will increase dramatically in order to obtain very high effective precision. In this article, we have first proposed a new method, called efficient fast-convergence additive normalization, to solve the largehardware-cost problem present in the previous fast-convergence method. Then, leading-zero bit detection (LZD) of 0:v is applied to the new efficient fast-convergence method. With this technique, the efficient fast-convergence method can be used to obtain very high effective-precision exponential function at a low hardware cost. We have designed a 24-bit and a 53-bit effective-precision exponential unit using our proposed methods. Thorough simulations of this 24-bit unit have verified that our proposed methods are correct. From our implementation results, we have shown that the proposed efficient fast-convergence method is very effective in improving the cost and speed of the exponential units. Furthermore, we have also shown that the hardware cost of the 48-bit proposed efficient exponential unit can be reduced by about 41% by using the LZD technique. We conclude that our proposed efficient fast-convergence method with LZD technique can very effectively enhance the performance of exponential unit design.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Efficient computation of very high effective-precision exponential function with additive normalization method

Chen

2011

Journal of the Chinese Institute of Engineers

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“…A detailed explanation of this operation can be found in [35,49]. It utilizes only shift registers and adders in order to reduce the amount of hardware resources needed for implementing exponential functions.…”

Section: Factor K Generatormentioning

confidence: 99%

Hardware Implementation of an Automatic Rendering Tone Mapping Algorithm for a Wide Dynamic Range Display

Ofili

Glozman

Yadid-Pecht

2013

JLPEA

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Tone mapping algorithms are used to adapt captured wide dynamic range (WDR) scenes to the limited dynamic range of available display devices. Although there are several tone mapping algorithms available, most of them require manual tuning of their rendering parameters. In addition, the high complexities of some of these algorithms make it difficult to implement efficient real-time hardware systems. In this work, a real-time hardware implementation of an exponent-based tone mapping algorithm is presented. The algorithm performs a mixture of both global and local compression on colored WDR images. An automatic parameter selector has been proposed for the tone mapping algorithm in order to achieve good tone-mapped images without manual reconfiguration of the algorithm for each WDR image. Both algorithms are described in Verilog and synthesized for a field programmable gate array (FPGA). The hardware architecture employs a combination of parallelism and system pipelining, so as to achieve a high performance in power consumption, hardware resources usage and processing speed. Results show that the hardware architecture produces images of good visual quality that can be compared to software-based tone mapping algorithms. High peak signal-to-noise ratio (PSNR) and structural similarity (SSIM) scores were obtained when the results were compared with output images obtained from software simulations using MATLAB.

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“…There are several of techniques used by modern computers [3]. Previous project [1] mentioned by [4][5] generally degree and radian are the terms given as inputs to these function. The complete trigonometric functions waveform is shown in Fig.…”

Section: Literature Reviewmentioning

confidence: 99%

Full cycle trigonometric function on Intel Quartus II Verilog

Mustapha

Zulkarnain²

2018

AIP Conference Proceedings

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Abstract. This paper discusses about an improvement of a previous research on hardware based trigonometric calculations. Tangent function will also be implemented to get a complete set. The functions have been simulated using Quartus II where the result will be compared to the previous work. The number of bits has also been extended for each trigonometric function. The design is based on RTL due to its resource efficient nature. At earlier stage, a technology independent test bench simulation was conducted on ModelSim due to its convenience in capturing simulation data so that accuracy information can be obtained. On second stage, Intel/Altera Quartus II will be used to simulate on technology dependent platform, particularly on the one belonging to Intel/Altera itself. Real data on no. logic elements used and propagation delay have also been obtained.

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On hardware for computing exponential and trigonometric functions

Cited by 63 publications

References 19 publications

Efficient computation of very high effective-precision exponential function with additive normalization method

Efficient computation of very high effective-precision exponential function with additive normalization method

Hardware Implementation of an Automatic Rendering Tone Mapping Algorithm for a Wide Dynamic Range Display

Full cycle trigonometric function on Intel Quartus II Verilog

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