2019
DOI: 10.1109/tec.2018.2881737
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On Harmonic Injection Anti-Islanding Techniques Under the Operation of Multiple DER-Inverters

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Cited by 25 publications
(21 citation statements)
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“…In the current work, the anti-islanding protection technique that has been proposed in reference [2] is modified, in order to take into account the effect of parallel operation of multiple DER-inverters that are connected to the same node. This problem has been also stated in reference [9], where a solution based on an external accumulator was proposed. In this work, a different solution is proposed that prolongs the harmonic injection in order to achieve a required overlap among the injected harmonic components of inverters.…”
Section: Introductionmentioning
confidence: 86%
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“…In the current work, the anti-islanding protection technique that has been proposed in reference [2] is modified, in order to take into account the effect of parallel operation of multiple DER-inverters that are connected to the same node. This problem has been also stated in reference [9], where a solution based on an external accumulator was proposed. In this work, a different solution is proposed that prolongs the harmonic injection in order to achieve a required overlap among the injected harmonic components of inverters.…”
Section: Introductionmentioning
confidence: 86%
“…Now let us assume that N current-source inverters (of P N [n] nominal power each) that utilize the anti-islanding technique in reference [2], as well as M other DER-inverters (that may or may not utilize the anti-islanding technique) of a total nominal power P Mtot that might be potentially installed are connected to the same PCC, and that P tot = P Mtot + P Ntot . According to the analysis that is conducted in reference [9], the magnitude of the induced voltage that is caused by each inverter of the N-subgroup can be expressed by the following equation:…”
Section: Description Of the Issue That Arises By The Parallel Operatimentioning
confidence: 99%
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“…To this end, several inverter-design concepts have been proposed, aiming at the compliance of LV-IIDGs with LVRT requirements [5][6][7].Since LVRT requirements keep DG-units connected to the network during faults, they contradict the requirement for a quick anti-islanding detection. Indeed, despite the fact that several efficient passive [8], active [9][10][11][12], or other hybrid methods [13] have been proposed over the last years for fast anti-islanding detection, their cooperation with LVRT operation remains a challenging issue under research, especially under high DG-penetration conditions. The authors of [14] attempted to clarify this contradiction, by allowing a PV-unit to trip without complying with LVRT, if passive anti-islanding detection asserts.…”
mentioning
confidence: 99%