On Instruction Sets and Their Fornmts

Flynn,; Johnson, _______; Wakefield,

doi:10.1109/tc.1985.1676567

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Primitive Based Architectures1

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1987

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Cited by 12 publications

(1 citation statement)

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“…The separation of the information needed to express the number and nature of arguments in a format field has been proposed before [1], allowing the definition of the Adept architecture [2]. Unfortunately these approaches are not well suited to actual trends because they require instructions with a variable number of fields and length, rendering the decoding process difficult.…”

Section: Primitive Based Architecturesmentioning

confidence: 99%

Primitive based architectures

Fritsch¹,

Sánchez²,

Anaya³

1990

SIGARCH Comput. Archit. News

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Section: Primitive Based Architecturesmentioning

confidence: 99%

Primitive based architectures

Fritsch¹,

Sánchez²,

Anaya³

1990

SIGARCH Comput. Archit. News

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Characteristics of a programmable logic unit

Murayama

Yamada

Nakamura

et al. 1987

Systems & Computers in Japan

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This paper considers a programmable logic unit (PLU) which is a computing‐in‐memory device with stepwise programmable computing logics and the data transmission lines/buses, and discusses its operational characteristics. The PLU is combined with the memory device in a Neumann‐type computer with a great number of computing logics. From the viewpoint of Flynn's classification in the Neumann‐type computer, we consider the level‐1 PLU and the level‐2 PLU as structures for the PLU, and discuss their configurations in detail. First, we discuss the mapping method and the number of steps for the program of the mathematical expression. It is shown that the PLU can map directly the program written in the inverse‐Poland notion and that the connection lines/buses can easily be assigned. Second, we discuss the comparison between the computing time of the computer with the PLU and the processing time of the Neumann‐type computer. It is shown that the computer with the PLU is several times faster than the Neumann‐type computer in processing the program. On the other hand, it is seen that the level‐2 PLU with the distributed buses is suited to the general‐purpose computer, although the processing speed is somewhat low.

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Schnieder¹

1993

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On Instruction Sets and Their Fornmts

Cited by 12 publications

References 6 publications

Primitive based architectures

Primitive based architectures

Characteristics of a programmable logic unit

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