Random physical variations and noise are growing challenges for advanced electronic systems. Field programmable systems can, in principle, adapt to these phenomena, but two main problems must be addressed: how to efficiently characterize random variations and how to perform subsequent optimization. This paper addresses both of these questions. First, an approach to self-test is presented that uses on-chip noise emulation to quickly characterize some of the hidden variations in latches. Our noise-injection experiments demonstrate that there can be significant spreads in latch reliability even with current 65nm field-programmable gate arrays (FPGAs). We detected coefficients of variation as high as 77%. Second, we propose an approach to self-optimization using local resource swapping. Experiments on two FPGAs show improvements in mean-time-between-failures (MTBF) of up to 60%.