This paper presents an algorithmic procedure for determining the cryptographic key properties and hence matching with the required complexity and strength to assure a more reliable and secure designs of cryptographic systems. The designed algorithm is capable to provide the cryptographic key structure based on optimum solution approach. Using the Hardware Description Language (HDL), Verilog, the key can be realized on Field Programmable Gate Array (FPGA) platform and then translated into Printed Circuit Board (PCB).