On-state current stress-induced subthreshold I–V instability in SiC DMOSFETs

Abstract

The reliability of SiC DMOSFETs has been studied in the past several years, including gate oxide reliability with time-dependent dielectric breakdown measurements [1][2], and threshold voltage stability with gate-bias and On-state current stress measurements [2][3][4]. For example, it has been reported that gate-bias stressing causes a time-dependent shift in threshold voltage, and that an On-state current stress causes a slightly larger thresholdvoltage instability [4]. Furthermore, it has been observed that an increase in Off-state leakage current can occur at high temperatures but which can be reduced with the application of a negative gate-bias, indicating an increase in subthreshold-voltage leakage current [5]. It has also been reported that the bias-stress induced threshold-voltage instability increases at increasing temperatures for some SiC MOSFET sample sets [6]. The subthreshold portion of the current-voltage (I-V) characteristic is what affects theOff-state leakage current, so it is particularly important to determine the effect of bias or current stress on the subthreshold I-V characteristics. Fig. 1 shows the subthreshold I-V characteristics of a 20-A SiC MOSFET, fairly representative of the state of the art, which has been subjected to gate-bias stress of both positive and negative bias. The subthreshold slopes have been found by fitting to the curves. The curves following an initial 10-s bias stress are in gray and the slope lines are dashed. The curves following a 10,000-s bias stress are in black and the slope lines are solid. The longer bias stress causes a noticeable shift to the right following positive bias stress, thus increasing the magnitude of the I-V instability. It is interesting to note that the subthreshold slope following negative gate-bias stress is more stretched out, which is likely due to oxide traps filling during the measurement [7]. Fig. 2 shows a similar instability in the I-V curves due to gate-bias stressing, but this time immediately following an On-state current stress of the same time duration. Clearly, the subthreshold slope following a negative gate-bias stress is now more stretched out, especially after the longer almost 10,000-s stress and the I-V curves move further apart for the longer bias (and On-state) stress. This result suggests that the On-state current stress creates additional active nearinterfacial charge traps.These results suggest that not only does On-state stressing of a SiC DMOSFET increase the threshold-voltage instability due to increased charge trapping [4], but that the subthreshold-voltage characteristic is shifted permanently to the left and is degraded such that there is an increased chance that Off-state leakage current could increase, especially at elevated operating temperatures -at the very least that the margin has been noticeably reduced. These measurements were all performed at 30°C, although self-heating during the On-state stress raised the temperature of the device under test to around 70°C. It still remains to compare the effect of t...

Bias temperature instability in SiC metal oxide semiconductor devices

“…After the inversion of SiC MOSFETs, the influence of the onstate current stress on instability should be considered, and gate bias stress must exist if on-current stress is present. Lelis et al [53,54] reported that V th instability caused by the joint on-current and gate bias stress is greater than that induced by gate bias stress alone, but this difference is not significant. Usually, an on-current stress of 1 h likely causes an onstate conduction loss of about 7%.…”

“…By contrast, traps near the SiC/SiO 2 interface that can exchange charges with substrates are also called border traps in oxides or NIOTs [63]. These NIOTs in oxides are the main charge-trapping active defects that result in V th instability, which is attributed to the charge and discharge of NIOTs or a carrier's tunneling into and out of NIOTs [23,24,50,53,54]. Therefore, studies have focused on NIOT-induced V th instability.…”