On Synthesis of Boolean Expressions for Memristive Devices Using Sequential Implication Logic

Poikonen, Jussi; Lehtonen, Eero; Laiho, Mika

doi:10.1109/tcad.2012.2187524

Cited by 32 publications

(51 citation statements)

References 13 publications

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“…higher percentage of don't cares corresponds to relatively better results. With the optimization of selecting the essential prime implicants during intermediate steps, this method is better than the method from [14,15,22]. Lehtonen method does not provide benchmark data, so actual side by side comparisons are not done, and can be done in future.…”

Section: Discussionmentioning

confidence: 99%

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Logic synthesis and a generalized notation for memristor-realized material implication gates

Raghuvanshi¹,

Perkowski²

2014

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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The paper presents new logic synthesis methods for single-output incomplete multi-level binary circuits using Memristor-based material implication gates. The first method follows Lehtonen's assumption of using only two working memristors. The algorithm minimizes the number of implication (IMPLY) gates, which corresponds to minimizing the number of pulses or the delay time. This greedy search method uses essential and secondary essential primes, does not require solving the covering problem, is fast, and produces high quality results. We compare it to other synthesis methods, such as the modified SOP and Exclusive-Or Sum of Products (ESOP) with minimum number of working memristors. We analyze the problem of reduction in IMPLY gate count by adding more working memristors and introduce Imply Sequence Diagrams, a new notation, similar to one used in reversible logic.

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Section: Discussionmentioning

confidence: 99%

“…More information on memristors, IMPLY gates and generation of timing pulses can be found in [2,3,11,22].…”

Section: Imply Sequence Diagrammentioning

confidence: 99%

Logic synthesis and a generalized notation for memristor-realized material implication gates

Raghuvanshi¹,

Perkowski²

2014

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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“…The considered memristive stateful logic operations were selected in the implementation of the MLA as they require simpler CMOS control circuitry than other possible stateful logic operations, namely logical AND and logical OR [8]. Various different ways of synthesizing a given Boolean function using unconditional write operations and the material implication and converse nonimplication operations have been presented for example in [21]. It should be noted that stateful logic differs from conventional logic computation in several ways.…”

Section: A the Memristive Logic Arraymentioning

confidence: 99%

Recursive Algorithms in Memristive Logic Arrays

Lehtonen

Poikonen

Tissari

et al. 2015

IEEE J. Emerg. Sel. Topics Circuits Syst.

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In memristive stateful logic memristors store logic values as their memristance states and perform logical operations on them. This form of logic has been studied intensively since it was first empirically demonstrated in the work of Borghetti et al., 2010. It has been previously noted that substantial parallelism in stateful computation is required to make this form of logic competetive with conventional logic computing paradigms. In this work we show how a certain class of vectorized recursive algorithms can be computed in a semiconductor/memristor hybrid array structure. This class of algorithms allows efficient computation of many practically important vector operations; examples considered in this paper include the binary sum of vectors, the parity of a vector, and the Hamming weight of a vector. We present theoretical analysis of the time and space complexity of this class of operations, and show examples of this computing method using circuit-level simulations. We also discuss possible applications of these operations in massively parallel memristive array computing.

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“…The time needed for computation (valuation) of y depends on the length of corresponding RBF. The same authors in their follow-up paper [12] gave heuristic algorithm for RBFs minimization, which is in Depth-First Search (DFS for short) manner. Beside DFS property, minimization algorithm from [12] is polynomial, sub-optimal greedy heuristic, working only on a subset of all positive product term orders, which still represent BF of interest.…”

Section: Recursive Boolean Formula For Implication Logic a Relatmentioning

confidence: 99%

“…In our paper, we give a generalization of theoretical concept behind minimization procedures described in [12], by introducing regular positive product term orders in RBFs, and establishing necessary and sufficient conditions for representation of the same BF after positive product terms have been reordered accordingly. As a corollary, we developed novel algorithms for minimization of RBFs, based on Breadth-First Search (BFS) traversal.…”

Section: B Regularly Ordered Recursive Boolean Formulamentioning

confidence: 99%

Recursive Boolean Formula Minimization Algorithms for Implication Logic

Teodorovic

Dautovic

Malbaša

2013

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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In this paper are given two novel algorithms for minimization of recursive Boolean formula (RBF), which is adequate for implementation of N-input 1-output Boolean functions (BFs) over basis {imply, false} using two memristors. Both of our algorithms are direct consequence of necessary and sufficient conditions related to regular ordering of positive product terms within recursive formula. The results demonstrate how developed algorithms provide up to 26% gain in average number of implications and shorter recursive Boolean formula length in up to 77% of problem instances than previously published algorithms, tested on the set of all 4-input 1-output BFs.Index Terms-Logic implication, logic synthesis and minimization, memristor-based digital logic, recursive Boolean formula.

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On Synthesis of Boolean Expressions for Memristive Devices Using Sequential Implication Logic

Cited by 32 publications

References 13 publications

Logic synthesis and a generalized notation for memristor-realized material implication gates

Logic synthesis and a generalized notation for memristor-realized material implication gates

Recursive Algorithms in Memristive Logic Arrays

Recursive Boolean Formula Minimization Algorithms for Implication Logic

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