2011
DOI: 10.1007/978-94-007-0089-5_12
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On Synthesis of Reduced Order Models

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Cited by 12 publications
(20 citation statements)
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“…Circuit simulators however can only handle mathematical representations to a limited extent, and reduced models have to be synthesized with RLC circuit elements. We reduce all circuits with respect to the input impedance transfer function (i.e., the inputs are the currents injected into the circuit terminals and the outputs are the voltages measured at the terminals) [123]. After converting the reduced input impedance transfer function to netlist format, the reduced circuit can be driven easily by currents or voltages when simulated.…”
Section: Circuit Representation Of Reduced Impedance Transfer Functionmentioning
confidence: 99%
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“…Circuit simulators however can only handle mathematical representations to a limited extent, and reduced models have to be synthesized with RLC circuit elements. We reduce all circuits with respect to the input impedance transfer function (i.e., the inputs are the currents injected into the circuit terminals and the outputs are the voltages measured at the terminals) [123]. After converting the reduced input impedance transfer function to netlist format, the reduced circuit can be driven easily by currents or voltages when simulated.…”
Section: Circuit Representation Of Reduced Impedance Transfer Functionmentioning
confidence: 99%
“…3.4.4). Here, models obtained with dominant SZM are converted to netlist representations using the Foster impedance realization approach [118,121]. Netlist formats for the SPRIM/IOPOR [114,116,137] reduced models are obtained via the RLCSYN unstamping procedure in [123,137].…”
Section: Circuit Representation Of Reduced Impedance Transfer Functionmentioning
confidence: 99%
“…Finally, the reduced conductance matrix can be realized as a reduced resistor network that is equivalent to the original network. This is done easily by unstampig the values in the G matrix intro the corresponding resistor values and their node connections in the netlist [68]. Since the number of resistors (and number of nodes) is smaller than in the original network, also the resulting netlist is smaller in size.…”
Section: Improved Approachmentioning
confidence: 99%
“…Here, we emphasize that applying modal approximation to reduce (5.45) directly is unsuitable especially if the underlying RC circuit has many terminals (inputs). This is because modal approximation does not preserve the structure of B and B T during reduction (for ease of understanding we denote the input-output structure loss as non-preservation of terminals) [68]. Modeling the input-output connectivity of the reduced model would require synthesis via controlled sources at the circuit terminals, and furthermore would connect all terminals with one-another [68].…”
Section: Reduction Of Rc Networkmentioning
confidence: 99%
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