On the decline of testing efficiency as fault coverage approaches 100%

Wang, L.-C.; Mercer, P.R.; Kao, Shih-Chou; Williams, T.W.

doi:10.1109/vtest.1995.512620

Cited by 38 publications

(14 citation statements)

References 19 publications

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“…As shown in [18], unbiased testing provides higher test quality than a test method that is biased by a particular fault model. Simulations results for benchmark circuits demonstrate the effectiveness of the proposed method for defect screening.…”

Section: Introduction *mentioning

confidence: 99%

Generation of compact test sets with high defect coverage

Kavousianos

Chakrabarty

2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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Abstract-Multi-detect (N-detect) testing suffers from the drawback that its test length grows linearly with N. We present a new method to generate compact test sets that provide high defect coverage. The proposed technique makes judicious use of a new pattern-quality metric based on the concept of output deviations. We select the most effective patterns from a large N-detect pattern repository, and guarantee a small test set as well as complete stuck-at coverage. Simulation results for benchmark circuits show that with a compact, 1-detect stuck-at test set, the proposed method provides considerably higher transition-fault coverage and coverage ramp-up compared to another recently-published method. Moreover, in all cases, the proposed method either outperforms or is as effective as the competing approach in terms of bridging-fault coverage and the surrogate BCE+ metric. In many cases, higher transition-fault coverage is obtained than much larger N-detect test sets for several values of N. Finally, our results provide the insight that, instead of using N-detect testing with as large N as possible, it is more efficient to combine the output deviations metric with multi-detect testing to get highquality, compact test sets.

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Section: Introduction *mentioning

confidence: 99%

Generation of compact test sets with high defect coverage

Kavousianos

Chakrabarty

2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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“…Additionally, we studied the effects of test compaction on the defect coverage of such test sets. Defects were represented by bridging faults and transition faults using the framework proposed in [5] and [6]. We used several test generation procedures to generate compacted and noncompacted stuck-at test sets of various types, including n-detection test sets and pseudofunctional test sets.…”

Section: Discussionmentioning

confidence: 99%

Compact test sets for high defect coverage

Reddy

Pomeranz

Kajihara

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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It was recently observed that, in order to improve the defect coverage of a test set, test generation based on fault models such as the single-line stuck-at model may need to be augmented so as to derive test sets that detect each modeled fault more than once. In this work, we report on test pattern generators for combinational circuits that generate test sets to detect each single line stuck-at fault a given number of times. Additionally, we study the effects of test set compaction on the defect coverage of such test sets. For the purpose of experimentation, defect coverage is measured by the coverage of surrogate faults, using a framework proposed earlier. Within this framework, we show that the defect coverage does not have to be sacrificed by test compaction if the test set is computed using appropriate test generation objectives. Moreover, two test sets generated using the same test generation objectives, except that compaction heuristics were used during the generation of one but not the other, typically have similar defect coverages, even if the compacted test set is significantly smaller than the noncompacted one. Test generation procedures and experimental results to support these claims are presented.

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“…Consider a two-pattern Launch-On-Capture (LOC) test <V 1 , V 2 > where V 1 =(v 11 ,v 12 ,v 13 ,…,v 1n ) is the first n-bit vector applied on the CUT and V 2 =(v 21 ,v 22 ,v 23 ,…,v 2n ) is the response of V 1 which is applied as the second test vector to the CUT. If the logic value of V 1 corresponding to cell i, (i.e., v 1i ) is unspecified then it should be filled with value 1(0) provided that the probability of v 2i (i.e., the logic value of V 2 corresponding to the scan cell i) taking the value 1(0) is higher than taking the value 0(1).…”

Section: A Overview Of Fill-adjacent and Preferred-fill Techniquesmentioning

confidence: 99%

“…Output deviations provide an efficient probabilistic means to evaluate test vectors based on their potential for detecting arbitrary defects and, most importantly, without being biased towards any particular fault model. As shown in [21], unbiased testing provides higher test quality than a test method that is biased by a particular fault model. The efficiency of the proposed method is demonstrated through experiments with the ISCAS and IWLS [27] benchmark circuits.…”

mentioning

confidence: 99%

Defect aware X-filling for low-power scan testing

Balatsouka¹,

Tenentes²,

Kavousianos³

et al. 2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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Abstract-Various X-filling methods have been proposed for reducing the shift and/or capture power in scan testing. The main drawback of these methods is that X-filling for low power leads to lower defect coverage than random-fill. We propose a unified low-power and defect-aware X-filling method for scan testing. The proposed method reduces shift power under constraints on the peak power during response capture, and the power reduction is comparable to that for the Fill-Adjacent X-filling method. At the same time, this approach provides high defect coverage, which approaches and in many cases is higher than that for random-fill, without increasing the pattern count. The advantages of the proposed method are demonstrated with simulation results for the largest ISCAS and the IWLS benchmark circuits.

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On the decline of testing efficiency as fault coverage approaches 100%

Cited by 38 publications

References 19 publications

Generation of compact test sets with high defect coverage

Generation of compact test sets with high defect coverage

Compact test sets for high defect coverage

Defect aware X-filling for low-power scan testing

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