On the feasibility of a scalable opto-electronic CRCW shared memory

Abstract

In the paper we discuss the results of a feasibility study of an opto-electronic shared memory with concurrent read, concurrent write capability. Unlike previous such work we consider a true hardware shared memory rather then a simulation on a tightly, optically connected distributed memory computer. We describe a n a r chitecture that can be implemented using semiconductor based light modulator and VCSEL laser diode arrays and microlenses. We show how to solve two major problems faced by such a device: optical system complexity and parallel word level write consistency. An analysis of the fundamental performance constraints proves that in general the memory density decreases only linearly with the degree o f c oncurrency as opposed to the quadratic decrease in electronic parallel access memory. Under certain circumstances the memory density can even be shown to be independent of the number of accessing processors. We argue that in principle, a memory with GBytes capacity and a latency of about 1 ns, accessed by thousands of processors is conceivable.