Operation of the Neural z-Vertex Track Trigger for Belle II in 2021 - a Hardware Perspective

Abstract

To reduce the background the z-Vertex Track Trigger estimates the collision origin in the Belle II experiment using neural networks. The main part is a pre-trained multilayer perceptron. The task of this perceptron is to estimate the z-vertex of the collision to suppress background from outside the interaction point. For this, a low latency real-time FPGA implementation is needed. We present an overview of the architecture and the FPGA implementation of the neuronal network and the preprocessing. We also show the handling of missing input data through preprocessing with specially trained neuronal networks implemented in hardware. For this, we will show the results of the z-vertex estimation and the latency for the implementation in the Belle II trigger system. Major update for the preprocessing stage utilizing a 3D Hough transformation processing step is ongoing.