Operational amplifier design with gain-enhancement differential amplifier

Tran, Phuoc T.; Hess, H.L.; Noren, K.V.

doi:10.1109/iecon.2012.6389027

Cited by 4 publications

(2 citation statements)

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“…In the context of standard CMOS analog circuit design, a technique based on a similar concept of conductance cancellation (named "positive-feedback" or "negative conductance" technique) has been proposed to enhance the gain and gain-bandwidthproduct (GBW) of amplifiers [22][23][24]. In this case, the output conductance is positive and a feedback from the output node is used to generate a negative load conductance that compensates its value, thereby achieving high gains.…”

Section: Introductionmentioning

confidence: 99%

Boosting the voltage gain of graphene FETs through a differential amplifier scheme with positive feedback

Grassi

Gnudi

Lecce

et al. 2014

Solid-State Electronics

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We study a possible circuit solution to overcome the problem of low voltage gain of short-channel graphene FETs. The circuit consists of a fully differential amplifier with a load made of a cross-coupled transistor pair. Starting from the device characteristics obtained from self-consistent ballistic quantum transport simulations, we explore the circuit parameter space and evaluate the amplifier performance in terms of dc voltage gain and voltage gain bandwidth. We show that the dc gain can be effectively improved by the negative differential resistance provided by the cross-coupled pair. Contact resistance is the main obstacle to achieving gain bandwidth products in the terahertz range.Limitations of the proposed amplifier are identified with its poor linearity and relatively large Miller capacitance.

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Section: Introductionmentioning

confidence: 99%

Boosting the voltage gain of graphene FETs through a differential amplifier scheme with positive feedback

Grassi

Gnudi

Lecce

et al. 2014

Solid-State Electronics

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“…The proposed circuit has the crosscoupled MOS transistors that feedback between the input and the output nodes. The cross coupling is done in horizontal way that generates a negative transconductance m g  that cancels the positive output conductance of the PMOS load transistors and NMOS differential-pair at the output node which results a very high DC gain of the differential amplifier [4]. …”

Section: Gain Enhancement Techniquementioning

confidence: 99%

Low Power and High Gain Operational Transconductance Amplifier

Jain¹,

Gupta²

2016

IJCA

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A Positive feedback method for operational transconductance amplifiers is proposed operating at subthreshold region. In this paper a differential amplifier has designed with gain enhancement technique using positive feedback. The proposed circuit has improved specifications such as high DC gain, low power dissipation as compared to previous work. We designed CMOS OTA in a UMC 180nm technology powered with 1.8V exhibits 91.23-dB DC gain while consuming 35.72nW.

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