Optical and geometric parameter extraction across 300-mm photonic integrated circuit wafers

Abstract

The precise quantification of a dielectric waveguide core thickness, core width, core refractive index, and cladding refractive index across a wafer is critical for greater consistency and accuracy in photonic circuit fabrication. However, accurate wafer-scale measurements of these parameters have not yet been demonstrated. We have previously described a method for extracting these four parameters simultaneously from silicon nitride waveguides using unbalanced Mach–Zehnder interferometers on a single die. In this work, we show that this technique can be scaled to characterize these photonic parameters across an entire 300 mm wafer. The refractive indices of the core and cladding materials are found with relative standard deviations of the mean of 0.07% and 0.03%, respectively. The core width offset (bias) and thickness are found with relative standard deviations of 0.3% (2.6 nm) and 0.5% (1.1 nm), respectively. The extracted parameter maps suggest a radial variation of material indices and a planar variation of geometric parameters. We verify the extracted parameters by accurately predicting the performance of an unbalanced Mach–Zehnder interferometer and the degeneracy between different modes in straight waveguides.

Scaling photonic integrated circuits with InP technology: A perspective

“…Apart from this economic driver, the technological motivation for wafer size scaling is the adoption of advanced process equipment used in microelectronics, with which better uniformity and process control can be achieved. 182 Highquality membrane InP waveguides with loss figures 121 comparable to that of SOI photonics 75 are now demonstrated with DUV scanner lithography on 75 mm wafers. However, with the emphasis having been on Si microelectronics, equipment innovation has primarily targeted wafer diameters of over 200 mm.…”