Optically-Enabled Bloom Filter Label Forwarding Using a Silicon Photonic Switching Matrix

Terzenidis, Nikos; Moralis-Pegios, Miltiadis; Vagionas, Christos; Pitris, Stelios; Chatzianagnostou, E.; Maniotis, Pavlos; Syrivelis, Dimitris; Miliou, Amalia; Pleros, Nikos; Vyrsokinos, K.

doi:10.1109/jlt.2017.2760013

Cited by 5 publications

(1 citation statement)

References 62 publications

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“…The first one is a BF-label forwarding optically-enabled node using a programmable Si-pho switching matrix and 10 Gb/s incoming optical packets that carry their BF-encoded destination address, as in-packet labels [25]. The demonstration was performed using a Si-based 4 × 4 electro-optic carrier injection switching matrix directly controlled by an amplifier-less and Digital to Analog (DAC)-less FPGA board, which mimics the role of an actual control plane that processes the packets' labels and generates the proper electrical signals.…”

Section: Introductionmentioning

confidence: 99%

Silicon Photonics towards Disaggregation of Resources in Data Centers

et al. 2018

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Abstract:In this paper, we demonstrate two subsystems based on Silicon Photonics, towards meeting the network requirements imposed by disaggregation of resources in Data Centers. The first one utilizes a 4 × 4 Silicon photonics switching matrix, employing Mach Zehnder Interferometers (MZIs) with Electro-Optical phase shifters, directly controlled by a high speed Field Programmable Gate Array (FPGA) board for the successful implementation of a Bloom-Filter (BF)-label forwarding scheme. The FPGA is responsible for extracting the BF-label from the incoming optical packets, carrying out the BF-based forwarding function, determining the appropriate switching state and generating the corresponding control signals towards conveying incoming packets to the desired output port of the matrix. The BF-label based packet forwarding scheme allows rapid reconfiguration of the optical switch, while at the same time reduces the memory requirements of the node's lookup table. Successful operation for 10 Gb/s data packets is reported for a 1 × 4 routing layout. The second subsystem utilizes three integrated spiral waveguides, with record-high 2.6 ns/mm 2 , delay versus footprint efficiency, along with two Semiconductor Optical Amplifier Mach-Zehnder Interferometer (SOA-MZI) wavelength converters, to construct a variable optical buffer and a Time Slot Interchange module. Error-free on-chip variable delay buffering from 6.5 ns up to 17.2 ns and successful timeslot interchanging for 10 Gb/s optical packets are presented.

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Section: Introductionmentioning

confidence: 99%