Optimal cell flipping in placement and floorplanning

Pin assignment for wire length minimization after floorplanning phase

“…Because the assumptions or the objective are different from the previous algorithms, it is not appropriate to compare with them. In Table 2, the average improvement on total wire length is about 10.22%, and the average runtime is less than one minute (58.20 s), which is very efficient improvement in wire length reduction (The algorithms of flipping blocks [11] and white space redistribution [12] can averagely reduce the wire length by 1.47% and 4.60% respectively). Figure 4 shows the speed of optimization ratio of the simulated annealing algorithm.…”

“…Since accurate wire length is not available before routing step, typically the half-perimeter bounding box method is used to measure wire length, as other post-floorplanning optimization algorithms [11] [12] do. The circuits are first placed by a floorplanner, and then we formulate the problem of pin assignment as a Mixed Integer Linear Programming (MILP) problem.…”