Optimal Harmonic Stepped Waveform Technique for Solar Fed Cascaded Multilevel Inverter

Abstract

-In this paper, the Optimal Harmonic Stepped Waveform (OHSW) method is proposed in order to eliminate the selective harmonic orders available at the output of cascaded multilevel inverter (CMLI) fed by solar photovoltaic (SPV). This technique is used to solve the harmonic elimination equations based on stepped waveform analysis in order to obtain the optimal switching angles which in turn reduce the Total Harmonic Distortion (THD). The OHSW method considers the output voltage waveform as four equal symmetries in each half cycle. In the proposed method, a solar fed fifteen level cascaded multilevel is considered where the magnitude of six numbers of harmonic orders is reduced. A programmable pulse generator is developed to carry the switching angles directly to the semiconductor switches obtained as a result of OHSW analysis. Simulations are carried out in MATLAB/Simulink in which a separate model is developed for solar photovoltaic which serves as the input for cascaded multilevel inverter. A 3kWp solar plant with multilevel inverter system is implemented in hardware to show the effectiveness of the proposed system. Based on the observation the OHSW method provides the reduced THD thereby improving power quality in renewable energy applications.

Automatic Generation Control of a Two Area Thermal-Thermal Deregulated Power System with HES and TCPS units for Unscheduled Interchange Price Signals

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Asymmetric Three-Phase Cascading Trinary-DC Source Multilevel Inverter Topologies for Variable Frequency PWM

“…A generalized power loss algorithm for multilevel neutral-point clamped pulse width modulation technique is offered, which is appropriate to any level number of multilevel inverter [21]. A fifteen-level photovoltaic fed cascade multilevel inverter for the removal of certain harmonic orders is urbanized for the power quality development [22]. Fresh topologies for a cascade transformer sub-multilevel inverter with every sub-multilevel inverter consists of two DC voltage source with six power semiconductor switches to attain five-level output voltage [23].…”