Optimal implementation of UART-SPI Interface in SoC

Blessington, T. Praveen; Murthy, B. Bhanu; Ganesh, G.; Prasad, T. Satya

doi:10.1109/icdcsyst.2012.6188657

Cited by 24 publications

(5 citation statements)

References 2 publications

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“…The high accuracy of data communication is guaranteed by following three methods [10]: Two-level Synchronization, Frame-by-frame Calibration and Middle-Sampling. As shown in Fig.…”

Section: Sequence Control Modulementioning

confidence: 99%

Online-Programming IP Design and Implementation Based on SoC

Yang¹

2013

TOAUTOCJ

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It is mainly proposed that the design and implementation for an online-programming IP core based on MV10, an SoC, which is an 8-bit MCU having passed the silicon verification with Global Foundry 0.35um mix-signal library in this thesis. The online-programming IP core can write BIN file into the on-chip SRAM, which is mainly controlled by erasing state machine and programming state machine, for program debugging with high accuracy-communication and error self-detection. The online-programming IP core proposed in this thesis can also be used in other SoCs.

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“…The high accuracy of data communication is guaranteed by following three methods [10]: Two-level Synchronization, Frame-by-frame Calibration and Middle-Sampling. As shown in Fig.…”

Section: Sequence Control Modulementioning

confidence: 99%

Online-Programming IP Design and Implementation Based on SoC

Yang¹

2013

TOAUTOCJ

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“…While the reliability of wireless signal is always the problem standing on the road that prevent the development of the LTE system [4] . One of the biggest reason is the errors in primitive transfer, so this article imposes a method to solve this problem by UART [5] (universal asynchronous receiver/transmitter) and DMA [5] (Direct Memory Access).…”

Section: Introductionmentioning

confidence: 99%

Realization of Primitive Trace in TD-LTE RF Conformance Testing Instrument

2014

AMM

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In order to satisfy the requirement of reliability in the TD-LTE RF Conformance Testing Instrument, a method to achieve the trace of primitive of TD-LTE based on embedded system is imposed. According to the feature of the long term evolution (LTE) system, it highlights the details of primitive tracing through DMA and UART. The primitive is strongly real-time to achieve QoS in LTE. Verified multiple times this design achieves the primitive trace in LTE as well as meets the requirement of hardware platform in TD-LTE RF Conformance Testing Instrument.

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“…al. [7] this paper details the design and implementation of SoC's DART-SPI Interface. The DART-SPI interface provides usage for the universal asynchronous receiver/transmitter (DART) to serial peripheral interface (SPI).…”

Section: Dr Garima Bandhawarkar Wakhle Et Al [4]mentioning

confidence: 99%

VHDL Implementation of Universal Asynchronous Receiver Transmitter with Linear Feedback Shift Register

Singh¹,

Kaur²

2017

IJARCSSE

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Abstract-UART hardware are controlled by a clock signal which runs at a multiple of the data rate, typically 8 times the bit rate. The receiver tests the state of the incoming signal on each clock pulse, looking for the beginning of the start bit. If the apparent start bit lasts at least one-half of the bit time, it is valid and signals the start of a new character.In this paper review the different method of uart transmission and receiver

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Optimal implementation of UART-SPI Interface in SoC

Cited by 24 publications

References 2 publications

Online-Programming IP Design and Implementation Based on SoC

Online-Programming IP Design and Implementation Based on SoC

Realization of Primitive Trace in TD-LTE RF Conformance Testing Instrument

VHDL Implementation of Universal Asynchronous Receiver Transmitter with Linear Feedback Shift Register

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