Optimal linearity testing of analog-to-digital converters using a linear model

Cherubal, S.; Chatterjee, Abhijit

doi:10.1109/tcsi.2003.809775

Cited by 19 publications

(4 citation statements)

References 19 publications

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“…In ADC testing, a histogram shows how many times each output code appears in the response vector, regardless the location [5]. Linear ramp simplifies computation due to the proportionality of the step width to the number of hits of each code [5][6][7]. But the speed of the ramp has not to be too fast unless the code will not be hit as many times as needed in order to get the best resolution and repeatability [8].…”

Section: Introductionmentioning

confidence: 99%

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

Mansour¹,

Maghrebi²,

Sifi³

et al. 2017

Int. J. Metrol. Qual. Eng.

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Abstract. This paper presents an implementation of a data acquisition system for analog-to-digital converters (ADCs) using "Laboratory Virtual Instrument Engineering Workbench (LabVIEW)" as software for data analysis. The designed and implemented platform allows interaction with the device under test through means of data acquisition and instrument controls. Developing custom tests in LabVIEW can result in reduced test time, which in turn will help reduce costs in testing. This system was developed for evaluation purposes of ADC's static and dynamic parameters (gain error, offset error, DNL, INL, SNR, SINAD, IMD, etc.) using single and multifrequency signals. The virtual control and analysis instrument was created in "LabVIEW" environment to control test signals generation and data acquisition. The testing performance of the platform is demonstrated using the classical ADC circuit "ADC0804". A comparison with experimental results obtained by CANTEST platform from Bordeaux University (France) is also presented to highlight our platform.

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Section: Introductionmentioning

confidence: 99%

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

Mansour¹,

Maghrebi²,

Sifi³

et al. 2017

Int. J. Metrol. Qual. Eng.

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“…Significant research has been done to improve testing techniques of Analog to Digital Convertors (ADC's) parameters. For instance, some focused on improving classical methods such as Fourier transform and Sinusoidal Histogram in testing AC and DC performance [5][6][7][8][9]. While Fourier Transform is based on additive noise model and requires a large number of data samples [2], histogram testing has most samples occur near the ends of histogram (large number of samples must be collected to increase the height of bins around the center) [1,4].…”

Section: Introductionmentioning

confidence: 99%

The Application Wavelet Transform Algorithm in Testing ADC Effective Number of Bits

Awada¹

2013

IJCSIT

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In evaluating Analog to Digital Convertors, many parameters are checked for performance and error rate.One of these parameters is the device Effective Number of Bits. In classical testing of Effective Number ofBits, testing is based on signal to noise components ratio (SNR), whose coefficients are driven viafrequency domain (Fourier Transform) of ADC’s output signal. Such a technique is extremely sensitive tonoise and require large number of data samples. That is, longer and more complex testing process as thedevice under test increases in resolutions. Meanwhile, a new time – frequency domain approach (known asWavelet transform) is proposed to measure and analyze Analog-to-Digital Converters parameter ofEffective Number of Bits with less complexity and fewer data samples.In this work, the algorithm of Wavelet transform was used to estimate worst case Effective Number of Bitsand compare the new testing results with classical testing methods. Such an algorithm, Wavelet transform,have shown DSP testing process improvement in terms of time and computations complexity based on itsspecial properties of multi-resolutions

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“…It reduces test cost by using low precision input signals and reduces test time by sampling the overall set of ADC codes and using a least squares fitting algorithm to determine the coefficients of the input-output transfer function polynomial corresponding to the converter. Linear model based test is proposed in [7]- [8]. The approach builds a linear model in terms of code transition points and errors and measures only a defined subset of code transition levels.…”

Section: Introductionmentioning

confidence: 99%

Optimal Linearity Testing of Sigma-Delta Based Incremental ADCs Using Restricted Code Measurements

Kook

Gomes

Jin

et al. 2011

2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop

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Linearity testing of high-precision (beyond 20-bit resolution) Analog-to-Digital converters (ADCs) is extremely expensive due to the large number of codes (>16 million for a 24-bit converter) that need to be tested and the associated low data rates making traditional histogram based testing infeasible. Industry often performs linearity test for such high-precision data converters with significantly reduced numbers of code measurements during production test. Given a specified allowed number of code measurements, the problem is to determine the requisite code points that result in the highest failure coverage. In this report, a methodology and tools for analyzing the "goodness" of a particular choice of test code points versus another is described. A least squares based polynomial fitting approach using measurements made at selected test code points is used to characterize the transfer function of the ADC for INL (Integral Nonlinearity) error. In addition, the characteristics of devices that may escape from the proposed approach (test escapes) are revealed for the specified test via an optimization based search technique. Software simulations are performed to study and validate the proposed methodology.

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Optimal linearity testing of analog-to-digital converters using a linear model

Cited by 19 publications

References 19 publications

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

The Application Wavelet Transform Algorithm in Testing ADC Effective Number of Bits

Optimal Linearity Testing of Sigma-Delta Based Incremental ADCs Using Restricted Code Measurements

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