Optimal procrastinating voltage scheduling for hard real-time systems

Zhang, Yan; Lu, Zhiqu; Lach, John; Skadron, K.; Stan, Mircea R.

doi:10.1109/dac.2005.193944

Cited by 8 publications

(3 citation statements)

References 8 publications

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“…Zhang et. al [32] propose a DVS algorithm composed by two parts: The first part is pre-computed (off-line) while the second one runs on-line. In the first part, the algorithm analyzes a log file containing task information to learn about the average task running time and task priority.…”

Section: B Energy Management and Thermal Controlmentioning

confidence: 99%

Exploring Energy Management on GPUs in Game Architectures

Zamith

Valente

Joselli

et al. 2014

JIS

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CPUs and GPUs have been evolving rapidly over time regarding their capabilities and processing power. This has opened many new possibilities for interactive and real time systems, such as more sophisticated scene realism, more precise and complex artificial intelligence, and better physical simulations. However, these improvements come at a cost: increase of energy consumption. Energy management in interactive and real time architectures have not been receiving much attention over the years, but this issue is likely to become important in the near future due to the increasing energy demand and consumption required by top-notch game applications(especially regarding the mobile and portable consoles). In this paper we introduce the concept of intelligent energy management for games and interactive systems and address the aforementioned issue through these contributions: 1) an investigation of works related to energy management (in general); 2) implementations of feasibility tests for energy management on GPUs; and 3) a novel game architecture with energy management, using multiple GPUs.

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Section: B Energy Management and Thermal Controlmentioning

confidence: 99%

Exploring Energy Management on GPUs in Game Architectures

Zamith

Valente

Joselli

et al. 2014

JIS

View full text Add to dashboard Cite

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“…The start time of the current task has to match the start time assumed for the currently calculated LUT entry (13). The relation between execution time and number of clock cycles is expressed in (14).…”

Section: A Offline Algorithmmentioning

confidence: 99%

“…In [12], [14], and [15], solutions were proposed that can be applied to singletask systems. In [13], the problem formulation was extended to multiple tasks, but it was assumed that continuous voltages were available on the processors.…”

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confidence: 99%

Quasi-Static Voltage Scaling for Energy Minimization With Time Constraints

Alexandru

Eles

Jovanovic

et al. 2011

IEEE Trans. VLSI Syst.

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Panoptic DVS: A fine-grained dynamic voltage scaling framework for energy scalable CMOS design

Putic

Liang

Calhoun

et al. 2009

2009 IEEE International Conference on Computer Design

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Abstract-The energy efficiency of a CMOS architecture processing dynamic workloads directly affects its ability to provide long battery lifetimes while maintaining required application performance. Existing scalable architecture design approaches are often limited in scope, focusing either only on circuit-level optimizations or architectural adaptations individually. In this paper, we propose a circuit/architecture codesign methodology called Panoptic Dynamic Voltage Scaling (PDVS) that makes more efficient use of common circuit structures and algorithm-level processing rate control. PDVS expands upon prior work by using multiple component-level PMOS header switches to enable fine-grained rate control, allowing efficient dithering among statically scheduled algorithms with sub-block energy savings. This way, PDVS is able to achieve a wide variety of processing rates to match incoming workload as closely as possible, while each iteration takes less energy to process than on architectures with coarser levels of rate control. Measurements taken from a fabricated 90nm test chip characterize both savings and overheads and are used to inform PDVS synthesis decisions. Results show that PDVS consumes up to 34% and 44% less energy than Multi-VDD and Single-VDD systems, respectively.

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Optimal procrastinating voltage scheduling for hard real-time systems

Cited by 8 publications

References 8 publications

Exploring Energy Management on GPUs in Game Architectures

Exploring Energy Management on GPUs in Game Architectures

Quasi-Static Voltage Scaling for Energy Minimization With Time Constraints

Panoptic DVS: A fine-grained dynamic voltage scaling framework for energy scalable CMOS design

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