2018
DOI: 10.1017/s1471068418000170
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Optimal Scheduling for Exposed Datapath Architectures with Buffered Processing Units by ASP

Abstract: Conventional processor architectures are restricted in exploiting instruction level parallelism (ILP) due to the relatively low number of programmer-visible registers. Therefore, more recent processor architectures expose their datapaths so that the compiler (1) can schedule parallel instructions to different processing units and (2) can make effective use of local storage of the processing units. Among these architectures, the Synchronous Control Asynchronous Dataflow (SCAD) architecture is a new exposed data… Show more

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Cited by 2 publications
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