Optimal Slope Ranking: An Approximate Computing Approach for Circuit Pruning

Zhang, Ziji; He, Yajuan; He, Jin; Yi, Xilin; Li, Qiang; Zhang, Bo

doi:10.1109/iscas.2018.8351238

Cited by 13 publications

(9 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Therefore, the power efficiency of the generated designs remains unclear. Extending [21], power, delay, and error estimators are used in [34] to assess the impact of pruning a node on the circuit's energy×delay. Nevertheless, only a 32-bit adder is examined in [34].…”

Section: Related Workmentioning

confidence: 99%

“…Extending [21], power, delay, and error estimators are used in [34] to assess the impact of pruning a node on the circuit's energy×delay. Nevertheless, only a 32-bit adder is examined in [34]. All these works produce static approximation circuits, neglecting the ability to dynamically reconfigure the accuracy at runtime.…”

Section: Related Workmentioning

confidence: 99%

“…In [4]- [7], [8]- [14], and [15]- [20] operation specific approximation techniques are proposed to build approximate adders, multipliers and dividers, respectively. In [21]- [34] approximate design automation frameworks are proposed to ease the generation of approximate circuits. In [35]- [39] complex application specific approximate accelerators are designed.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

2020

View full text Add to dashboard Cite

Leveraging the inherent error tolerance of a vast number of application domains that are rapidly growing, approximate computing arises as a design alternative to improve the efficiency of our computing systems by trading accuracy for energy savings. However, the requirement for computational accuracy is not fixed. Controlling the applied level of approximation dynamically at runtime is a key to effectively optimize energy, while still containing and bounding the induced errors at runtime. In this paper, we propose and implement an automatic and circuit independent design framework that generates approximate circuits with dynamically reconfigurable accuracy at runtime. The generated circuits feature varying accuracy levels, supporting also accurate execution. Extensive experimental evaluation, using industry strength flow and circuits, demonstrates that our generated approximate circuits improve the energy by up to 41% for 2% error bound and by 17.5% on average under a pessimistic scenario that assumes full accuracy requirement in the 33% of the runtime. To demonstrate further the efficiency of our framework, we considered two state-of-the-art technology libraries which are a 7nm conventional FinFET and an emerging technology that boosts performance at a high cost of increased dynamic power. INDEX TERMS Approximate computing, approximate design automation, dynamically reconfigurable accuracy, low power.

show abstract

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

2020

View full text Add to dashboard Cite

show abstract

“…Some works introduce further metrics for error estimation that also take into account the structure of the circuit being simplified, in addition to its functionality. Notably, Zhang et al [69] adopt the notion of Approximate Efficiency, defined as the ratio between the gain (in terms of Energy-Delay Product, EDP ) deriving from the simplification of a node and the corresponding induced error: ∆EDP/D. The underlying assumption is that, if two nodes generate the same error in the final output when pruned from the original circuit, the one leading to higher benefits should be pruned first.…”

Section: A Error Metricsmentioning

confidence: 99%

Approximate Logic Synthesis: A Survey

et al. 2020

View full text Add to dashboard Cite

Approximate computing is an emerging paradigm that, by relaxing the requirement for full accuracy, offers benefits in terms of design area and power consumption. This paradigm is particularly attractive in applications where the underlying computation has inherent resilience to small errors. Such applications are abundant in many domains, including machine learning, computer vision and signal processing. In circuit design, a major challenge is the capability to synthesize approximate circuits automatically, without manually relying on the expertise of designers. In this work, we review methods devised to synthesize approximate circuits given their exact functionality and an approximability threshold. We summarize strategies for evaluating the error that circuit simplification can induce on the output, which guide synthesis techniques in choosing the circuit transformations that lead to the largest benefit for a given amount of induced error. We then review circuit simplification methods that operate at gate or Boolean level, including those that leverage classical Boolean synthesis techniques to realize the approximations. We also summarize strategies that take highlevel descriptions such as C or behavioral Verilog and synthesize approximate circuits from these descriptions.

show abstract

“…Some notable efforts in inexact circuit research focus on manually designing specific arithmetic units, such as adders [13] or multipliers [5], while others adopt a more generic approach, enabling the simplification of any combinatorial circuit [11,7,6,9,10,2,4]. In order for these techniques to be effective, accurate error estimation is needed to understand the effect that each proposed transformation can induce at the circuit output (for example, which node to be selected for iterative node-removal [7,14], or which net to be substituted and simplified [10]). Among the state of the art in error estimation methods to guide the above approximation techniques, several works [9,12,7, 2] present a framework where errors are derived through Monte Carlo sampling of possible inputs, and expressed as statistical measures.…”

Section: Related Workmentioning

confidence: 99%

Partition and Propagate

Scarabottolo

Ansaloni

Constantinides

et al. 2019

Proceedings of the 56th Annual Design Automation Conference 2019

View full text Add to dashboard Cite

Inexact hardware design techniques have become popular in error-tolerant systems, where energy efficiency is a primary concern. Several techniques aim to identify circuit portions that can be discarded under an error constraint, but research on systematic methods to determine such error is still at an early stage. We herein illustrate a generic, scalable algorithm that determines the influence of each circuit gate on the final output. The algorithm first partitions the graph representing the circuit, then determines the error propagation model of the resulting subgraphs. When applied to existing approximate design frameworks, our solution improves their efficiency and result quality.

show abstract

Optimal Slope Ranking: An Approximate Computing Approach for Circuit Pruning

Cited by 13 publications

References 9 publications

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

Approximate Logic Synthesis: A Survey

Partition and Propagate

Contact Info

Product

Resources

About